diff mbox

[1/2] xen: arm64: doc: Add the requirement that SCR_EL3.HCE is enabled

Message ID 1461045570-6138-1-git-send-email-dirk.behme@de.bosch.com (mailing list archive)
State New, archived
Headers show

Commit Message

Dirk Behme April 19, 2016, 5:59 a.m. UTC
On ARM64 Linux the HVC instruction is used to trap into Xen. As this
can be set only at EL3, i.e. outside from Xen, document this boot
requirement.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
---
 docs/misc/arm/booting.txt | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Julien Grall April 20, 2016, 1:21 p.m. UTC | #1
(CC REST maintainers)

Hello Dirk,

Please CC the relevant maintainers for this patch. You can use 
scripts/get_maintainers.pl for this purpose.

On 19/04/16 06:59, Dirk Behme wrote:
> On ARM64 Linux the HVC instruction is used to trap into Xen. As this
> can be set only at EL3, i.e. outside from Xen, document this boot
> requirement.
>
> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
> ---
>   docs/misc/arm/booting.txt | 4 ++++
>   1 file changed, 4 insertions(+)
>
> diff --git a/docs/misc/arm/booting.txt b/docs/misc/arm/booting.txt
> index 9802e5e..ffc9029 100644
> --- a/docs/misc/arm/booting.txt
> +++ b/docs/misc/arm/booting.txt
> @@ -23,6 +23,10 @@ The exceptions to this on 32-bit ARM are as follows:
>
>   There are no exception on 64-bit ARM.
>
> +On ARM64 Linux it has to be ensured that the Secure Configuration
> +Register has the HVC instructions enabled at EL1 and above
> +(SCR_EL3.HCE == 1).

The requirement is the same for ARM32 (SCR.HCE == 1).

I would create a specific section in this documentation to list what the 
firmware should do in EL3 before starting Xen.

In addition to this patch, I would add a check in Xen to make sure the 
Hyp calls have been enabled by the firmware.

Regards,

> +
>   [1] linux/Documentation/arm/Booting
>   Latest version: http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/arm/Booting
>
>
Dirk Behme April 22, 2016, 6:23 a.m. UTC | #2
On 20.04.2016 15:21, Julien Grall wrote:
> (CC REST maintainers)
>
> Hello Dirk,
>
> Please CC the relevant maintainers for this patch. You can use
> scripts/get_maintainers.pl for this purpose.
>
> On 19/04/16 06:59, Dirk Behme wrote:
>> On ARM64 Linux the HVC instruction is used to trap into Xen. As this
>> can be set only at EL3, i.e. outside from Xen, document this boot
>> requirement.
>>
>> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
>> ---
>>   docs/misc/arm/booting.txt | 4 ++++
>>   1 file changed, 4 insertions(+)
>>
>> diff --git a/docs/misc/arm/booting.txt b/docs/misc/arm/booting.txt
>> index 9802e5e..ffc9029 100644
>> --- a/docs/misc/arm/booting.txt
>> +++ b/docs/misc/arm/booting.txt
>> @@ -23,6 +23,10 @@ The exceptions to this on 32-bit ARM are as follows:
>>
>>   There are no exception on 64-bit ARM.
>>
>> +On ARM64 Linux it has to be ensured that the Secure Configuration
>> +Register has the HVC instructions enabled at EL1 and above
>> +(SCR_EL3.HCE == 1).
>
> The requirement is the same for ARM32 (SCR.HCE == 1).
>
> I would create a specific section in this documentation to list what the
> firmware should do in EL3 before starting Xen.


Done:

http://lists.xen.org/archives/html/xen-devel/2016-04/msg02687.html


> In addition to this patch, I would add a check in Xen to make sure the
> Hyp calls have been enabled by the firmware.


Hmm, I have to re-read the documentation how to do this in EL2. We can't 
read SCR_EL3 in EL2?


Best regards

Dirk
Julien Grall April 22, 2016, 9:16 a.m. UTC | #3
Hi Dirk,

On 22/04/2016 07:23, Dirk Behme wrote:
> On 20.04.2016 15:21, Julien Grall wrote:
>> I would create a specific section in this documentation to list what the
>> firmware should do in EL3 before starting Xen.
>
>
> Done:
>
> http://lists.xen.org/archives/html/xen-devel/2016-04/msg02687.html

Thank you, I will look at it soon.

>
>> In addition to this patch, I would add a check in Xen to make sure the
>> Hyp calls have been enabled by the firmware.
>
>
> Hmm, I have to re-read the documentation how to do this in EL2. We can't
> read SCR_EL3 in EL2?

Oh yes. sorry I would have thought the register would be exposed RO to EL2.

Regards,
diff mbox

Patch

diff --git a/docs/misc/arm/booting.txt b/docs/misc/arm/booting.txt
index 9802e5e..ffc9029 100644
--- a/docs/misc/arm/booting.txt
+++ b/docs/misc/arm/booting.txt
@@ -23,6 +23,10 @@  The exceptions to this on 32-bit ARM are as follows:
 
 There are no exception on 64-bit ARM.
 
+On ARM64 Linux it has to be ensured that the Secure Configuration
+Register has the HVC instructions enabled at EL1 and above
+(SCR_EL3.HCE == 1).
+
 [1] linux/Documentation/arm/Booting
 Latest version: http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/arm/Booting