From patchwork Fri May 6 08:54:38 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quan Xu X-Patchwork-Id: 9030381 Return-Path: X-Original-To: patchwork-xen-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4457FBF29F for ; Fri, 6 May 2016 09:00:48 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6949D2035D for ; Fri, 6 May 2016 09:00:47 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D7E3820382 for ; Fri, 6 May 2016 09:00:41 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1aybai-0004WX-6f; Fri, 06 May 2016 08:58:32 +0000 Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1aybag-0004TU-AM for xen-devel@lists.xen.org; Fri, 06 May 2016 08:58:30 +0000 Received: from [193.109.254.147] by server-7.bemta-14.messagelabs.com id EC/CB-03757-5BC5C275; Fri, 06 May 2016 08:58:29 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrDLMWRWlGSWpSXmKPExsXS1tYhors1Rif cYMVqLoslHxezODB6HN39mymAMYo1My8pvyKBNePQv7dMBQeFKxb0H2VsYLzG38XIwSEkUCEx +1RSFyMnh4QAr8SRZTNYIWx/iR/zJjOB2EICNRJTDs5lB7HZBBQlNlxcDhYXEZCWuPb5MmMXI xcHs8BCJonla7rYQBLCAjES15e/AytiEVCVuLjwKBPILl4BR4meCcEQ8xUkln1Zywxicwo4Sb RNbWeH2OUo8WPaNqYJjLwLGBlWMWoUpxaVpRbpGhrpJRVlpmeU5CZm5ugaGpro5aYWFyemp+Y kJhXrJefnbmIEhgIDEOxgPDvN+RCjJAeTkijvqn/a4UJ8SfkplRmJxRnxRaU5qcWHGGU4OJQk eHOidcKFBItS01Mr0jJzgEEJk5bg4FES4f0LkuYtLkjMLc5Mh0idYlSUEuddAJIQAElklObBt cEi4RKjrJQwLyPQIUI8BalFuZklqPKvGMU5GJWEeaeBTOHJzCuBm/4KaDET0OL3czVBFpckIq SkGhgnrlm4Lm3qwZi7r0/dt3y8eFEye4Pr4X7e0wUubU37+o9t0Etu/OJS8Kl/a5n+K+F1e+Q 3VYe91VzlNKd4bVaB7okQ0/yKxOi1EWH8Z8xuMSbpzp+esX7rZLYty5/WqZnX3srnNf/cmpO4 8emiKTlFDScOCSes+HzmjdLp7V/vbpi9NOWHkgG/EktxRqKhFnNRcSIAIwNuxH8CAAA= X-Env-Sender: quan.xu@intel.com X-Msg-Ref: server-9.tower-27.messagelabs.com!1462525094!39896475!9 X-Originating-IP: [134.134.136.20] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTM0LjEzNC4xMzYuMjAgPT4gMzU1MzU4\n X-StarScan-Received: X-StarScan-Version: 8.34; banners=-,-,- X-VirusChecked: Checked Received: (qmail 46507 invoked from network); 6 May 2016 08:58:28 -0000 Received: from mga02.intel.com (HELO mga02.intel.com) (134.134.136.20) by server-9.tower-27.messagelabs.com with SMTP; 6 May 2016 08:58:28 -0000 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 06 May 2016 01:58:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,586,1455004800"; d="scan'208";a="969963849" Received: from xen-commits.sh.intel.com ([10.239.82.178]) by orsmga002.jf.intel.com with ESMTP; 06 May 2016 01:58:26 -0700 From: Quan Xu To: xen-devel@lists.xen.org Date: Fri, 6 May 2016 16:54:38 +0800 Message-Id: <1462524880-67205-9-git-send-email-quan.xu@intel.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1462524880-67205-1-git-send-email-quan.xu@intel.com> References: <1462524880-67205-1-git-send-email-quan.xu@intel.com> Cc: Kevin Tian , Feng Wu , Jun Nakajima , George Dunlap , Andrew Cooper , dario.faggioli@citrix.com, Jan Beulich , Quan Xu Subject: [Xen-devel] [PATCH v4 08/10] vt-d/ept: propagate IOMMU Device-TLB flush error up to EPT update. X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Propagate the IOMMU Device-TLB flush error up to the ept_set_entry(), when VT-d shares EPT page table. Signed-off-by: Quan Xu Acked-by: Kevin Tian CC: Jun Nakajima CC: Kevin Tian CC: George Dunlap CC: Jan Beulich CC: Andrew Cooper CC: Feng Wu --- xen/arch/x86/mm/p2m-ept.c | 3 ++- xen/drivers/passthrough/vtd/iommu.c | 4 ++-- xen/include/asm-x86/iommu.h | 3 ++- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c index 814cb72..34b96f8 100644 --- a/xen/arch/x86/mm/p2m-ept.c +++ b/xen/arch/x86/mm/p2m-ept.c @@ -832,7 +832,8 @@ out: need_modify_vtd_table ) { if ( iommu_hap_pt_share ) - iommu_pte_flush(d, gfn, &ept_entry->epte, order, vtd_pte_present); + ret = iommu_pte_flush(d, gfn, &ept_entry->epte, + order, vtd_pte_present); else { if ( iommu_flags ) diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c index a749c67..bf77417 100644 --- a/xen/drivers/passthrough/vtd/iommu.c +++ b/xen/drivers/passthrough/vtd/iommu.c @@ -1773,8 +1773,8 @@ static int intel_iommu_unmap_page(struct domain *d, unsigned long gfn) return dma_pte_clear_one(d, (paddr_t)gfn << PAGE_SHIFT_4K); } -int iommu_pte_flush(struct domain *d, u64 gfn, u64 *pte, - int order, bool_t present) +int __must_check iommu_pte_flush(struct domain *d, u64 gfn, u64 *pte, + int order, bool_t present) { struct acpi_drhd_unit *drhd; struct iommu *iommu = NULL; diff --git a/xen/include/asm-x86/iommu.h b/xen/include/asm-x86/iommu.h index 43f1620..3d2c354 100644 --- a/xen/include/asm-x86/iommu.h +++ b/xen/include/asm-x86/iommu.h @@ -27,7 +27,8 @@ int iommu_setup_hpet_msi(struct msi_desc *); /* While VT-d specific, this must get declared in a generic header. */ int adjust_vtd_irq_affinities(void); -int iommu_pte_flush(struct domain *d, u64 gfn, u64 *pte, int order, bool_t present); +int __must_check iommu_pte_flush(struct domain *d, u64 gfn, u64 *pte, + int order, bool_t present); bool_t iommu_supports_eim(void); int iommu_enable_x2apic_IR(void); void iommu_disable_x2apic_IR(void);