From patchwork Wed Jun 1 09:05:20 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quan Xu X-Patchwork-Id: 9146845 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 72DAB60761 for ; Wed, 1 Jun 2016 09:11:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 643F825819 for ; Wed, 1 Jun 2016 09:11:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 582AE2679B; Wed, 1 Jun 2016 09:11:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id AF2EF25819 for ; Wed, 1 Jun 2016 09:11:49 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1b829m-0001h1-3b; Wed, 01 Jun 2016 09:09:42 +0000 Received: from mail6.bemta6.messagelabs.com ([85.158.143.247]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1b829l-0001gf-5I for xen-devel@lists.xen.org; Wed, 01 Jun 2016 09:09:41 +0000 Received: from [85.158.143.35] by server-3.bemta-6.messagelabs.com id 39/9D-25713-456AE475; Wed, 01 Jun 2016 09:09:40 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrDLMWRWlGSWpSXmKPExsXS1tYhoRuyzC/ c4PF0DoslHxezODB6HN39mymAMYo1My8pvyKBNWPvjZMsBVsNKg4t3M/awLhBtYuRk0NIoFKi 8cxXJhBbQoBX4siyGawQtr/E9/+n2CBqaiRatm4Ai7MJqEjMaH7HDmKLCEhLXPt8mRHEZhaok rjf/RzMFhYIlbi06glYPYuAqsSfLxvB5vMKOEi8Pn6VGWK+gsSyL2vBbE4BR4l5k2czQuxykD hyYjn7BEbeBYwMqxjVi1OLylKLdI30kooy0zNKchMzc3QNDcz0clOLixPTU3MSk4r1kvNzNzE CQ4EBCHYwLvvrdIhRkoNJSZQ3Nc8vXIgvKT+lMiOxOCO+qDQntfgQowwHh5IEr/pSoJxgUWp6 akVaZg4wKGHSEhw8SiK8y5YApXmLCxJzizPTIVKnGBWlxHm/gCQEQBIZpXlwbbBIuMQoKyXMy wh0iBBPQWpRbmYJqvwrRnEORiVhXkWQ7TyZeSVw018BLWYCWhyf4QOyuCQRISXVwOhsoTu50O ixdPXH5Az9RJYVpaZ2t7iCw88tq1L5XhS/2egoc7Tu5wWhodpsW4uK6v3b8n5d7o1LrtOq6gx YlSqZsZflp927CefLnp9xtlHiPWslJDw1oOqvdG7az74rS6YeOOzeeMCxe+q6jacnn2Fh5ZY2 Z6/f55pvZxVxvOeM/4bjLXz7lFiKMxINtZiLihMBorKszH8CAAA= X-Env-Sender: quan.xu@intel.com X-Msg-Ref: server-15.tower-21.messagelabs.com!1464772178!16800229!2 X-Originating-IP: [134.134.136.24] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTM0LjEzNC4xMzYuMjQgPT4gMzkwOTcx\n X-StarScan-Received: X-StarScan-Version: 8.46; banners=-,-,- X-VirusChecked: Checked Received: (qmail 12427 invoked from network); 1 Jun 2016 09:09:39 -0000 Received: from mga09.intel.com (HELO mga09.intel.com) (134.134.136.24) by server-15.tower-21.messagelabs.com with SMTP; 1 Jun 2016 09:09:39 -0000 Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga102.jf.intel.com with ESMTP; 01 Jun 2016 02:09:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.26,400,1459839600"; d="scan'208";a="712116239" Received: from xen-commits.sh.intel.com ([10.239.82.178]) by FMSMGA003.fm.intel.com with ESMTP; 01 Jun 2016 02:09:38 -0700 From: "Xu, Quan" To: xen-devel@lists.xen.org Date: Wed, 1 Jun 2016 17:05:20 +0800 Message-Id: <1464771922-7794-2-git-send-email-quan.xu@intel.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1464771922-7794-1-git-send-email-quan.xu@intel.com> References: <1464771922-7794-1-git-send-email-quan.xu@intel.com> Cc: Quan Xu , kevin.tian@intel.com, feng.wu@intel.com, dario.faggioli@citrix.com, jbeulich@suse.com Subject: [Xen-devel] [Patch v11 1/3] IOMMU: add a timeout parameter for device IOTLB invalidation X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Quan Xu The parameter 'iommu_dev_iotlb_timeout' specifies the timeout of the device IOTLB invalidation in milliseconds. By default, the timeout is 1ms, which can be boot-time changed. Add a __must_check annotation. The followup patch titled 'VT-d IOTLB/Context/IEC flush issue' addresses the __mustcheck. That is the other callers of this routine (two or three levels up) ignore the return code. This patch does not address this but the other does. v11: Change the timeout parameter from 'vtd_qi_timeout' to 'iommu_dev_iotlb_timeout', which is not only for VT-d device IOTLB invalidation, but also for other IOMMU implementations. Signed-off-by: Quan Xu --- docs/misc/xen-command-line.markdown | 9 +++++++++ xen/drivers/passthrough/iommu.c | 3 +++ xen/drivers/passthrough/vtd/qinval.c | 34 +++++++++++++++++++++++----------- xen/include/xen/iommu.h | 2 ++ 4 files changed, 37 insertions(+), 11 deletions(-) diff --git a/docs/misc/xen-command-line.markdown b/docs/misc/xen-command-line.markdown index b4bae11..34a0f9c 100644 --- a/docs/misc/xen-command-line.markdown +++ b/docs/misc/xen-command-line.markdown @@ -996,6 +996,15 @@ debug hypervisor only). >> Enable IOMMU debugging code (implies `verbose`). +### iommu\_dev\_iotlb\_timeout +> `= ` + +> Default: `1` + +Specify the timeout of the device IOTLB invalidation in milliseconds. +By default, the timeout is 1 ms. When you see error 'Queue invalidate +wait descriptor timed out', try increasing this value. + ### iommu\_inclusive\_mapping (VT-d) > `= ` diff --git a/xen/drivers/passthrough/iommu.c b/xen/drivers/passthrough/iommu.c index 098b601..e12de69 100644 --- a/xen/drivers/passthrough/iommu.c +++ b/xen/drivers/passthrough/iommu.c @@ -24,6 +24,9 @@ static void parse_iommu_param(char *s); static void iommu_dump_p2m_table(unsigned char key); +unsigned int __read_mostly iommu_dev_iotlb_timeout = 1; +integer_param("iommu_dev_iotlb_timeout", iommu_dev_iotlb_timeout); + /* * The 'iommu' parameter enables the IOMMU. Optional comma separated * value may contain: diff --git a/xen/drivers/passthrough/vtd/qinval.c b/xen/drivers/passthrough/vtd/qinval.c index aa7841a..1a37565 100644 --- a/xen/drivers/passthrough/vtd/qinval.c +++ b/xen/drivers/passthrough/vtd/qinval.c @@ -28,6 +28,8 @@ #include "vtd.h" #include "extern.h" +#define IOMMU_QI_TIMEOUT MILLISECS(1) + static void print_qi_regs(struct iommu *iommu) { u64 val; @@ -130,10 +132,10 @@ static void queue_invalidate_iotlb(struct iommu *iommu, spin_unlock_irqrestore(&iommu->register_lock, flags); } -static int queue_invalidate_wait(struct iommu *iommu, - u8 iflag, u8 sw, u8 fn) +static int __must_check queue_invalidate_wait(struct iommu *iommu, + u8 iflag, u8 sw, u8 fn, + bool_t flush_dev_iotlb) { - s_time_t start_time; volatile u32 poll_slot = QINVAL_STAT_INIT; unsigned int index; unsigned long flags; @@ -163,14 +165,21 @@ static int queue_invalidate_wait(struct iommu *iommu, /* Now we don't support interrupt method */ if ( sw ) { + s_time_t timeout; + /* In case all wait descriptor writes to same addr with same data */ - start_time = NOW(); + timeout = flush_dev_iotlb ? + (NOW() + iommu_dev_iotlb_timeout * MILLISECS(1)) : + (NOW() + IOMMU_QI_TIMEOUT); + while ( poll_slot != QINVAL_STAT_DONE ) { - if ( NOW() > (start_time + DMAR_OPERATION_TIMEOUT) ) + if ( NOW() > timeout ) { print_qi_regs(iommu); - panic("queue invalidate wait descriptor was not executed"); + printk(XENLOG_WARNING VTDPREFIX + " Queue invalidate wait descriptor timed out\n"); + return -ETIMEDOUT; } cpu_relax(); } @@ -180,12 +189,14 @@ static int queue_invalidate_wait(struct iommu *iommu, return -EOPNOTSUPP; } -static int invalidate_sync(struct iommu *iommu) +static int __must_check invalidate_sync(struct iommu *iommu, + bool_t flush_dev_iotlb) { struct qi_ctrl *qi_ctrl = iommu_qi_ctrl(iommu); if ( qi_ctrl->qinval_maddr ) - return queue_invalidate_wait(iommu, 0, 1, 1); + return queue_invalidate_wait(iommu, 0, 1, 1, flush_dev_iotlb); + return 0; } @@ -254,7 +265,7 @@ static int __iommu_flush_iec(struct iommu *iommu, u8 granu, u8 im, u16 iidx) int ret; queue_invalidate_iec(iommu, granu, im, iidx); - ret = invalidate_sync(iommu); + ret = invalidate_sync(iommu, 0); /* * reading vt-d architecture register will ensure * draining happens in implementation independent way. @@ -300,7 +311,7 @@ static int __must_check flush_context_qi(void *_iommu, u16 did, { queue_invalidate_context(iommu, did, sid, fm, type >> DMA_CCMD_INVL_GRANU_OFFSET); - ret = invalidate_sync(iommu); + ret = invalidate_sync(iommu, 0); } return ret; } @@ -344,10 +355,11 @@ static int __must_check flush_iotlb_qi(void *_iommu, u16 did, u64 addr, dw, did, size_order, 0, addr); if ( flush_dev_iotlb ) ret = dev_invalidate_iotlb(iommu, did, addr, size_order, type); - rc = invalidate_sync(iommu); + rc = invalidate_sync(iommu, flush_dev_iotlb); if ( !ret ) ret = rc; } + return ret; } diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h index e917031..9891bc5 100644 --- a/xen/include/xen/iommu.h +++ b/xen/include/xen/iommu.h @@ -35,6 +35,8 @@ extern bool_t iommu_hap_pt_share; extern bool_t iommu_debug; extern bool_t amd_iommu_perdev_intremap; +extern unsigned int iommu_dev_iotlb_timeout; + #define IOMMU_PAGE_SIZE(sz) (1UL << PAGE_SHIFT_##sz) #define IOMMU_PAGE_MASK(sz) (~(u64)0 << PAGE_SHIFT_##sz) #define IOMMU_PAGE_ALIGN(sz, addr) (((addr) + ~PAGE_MASK_##sz) & PAGE_MASK_##sz)