diff mbox

[v3,12/16] xen/arm: Document the errata implemented in Xen

Message ID 1465315583-1278-13-git-send-email-julien.grall@arm.com (mailing list archive)
State New, archived
Headers show

Commit Message

Julien Grall June 7, 2016, 4:06 p.m. UTC
The new document will help to keep track of each erratum Xen is able to
handle.

The text is based on the Linux doc in Documents/arm64/silicon-errata.txt.

Also list the current errata that Xen is aware of.

Signed-off-by: Julien Grall <julien.grall@arm.com>

---
    Changes in v3:
        - Fix grammar in the commit message
        - s/Linux/Xen/
        - Mention that runtime patching is only supported by ARM64
---
 docs/misc/arm/silicon-errata.txt | 45 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)
 create mode 100644 docs/misc/arm/silicon-errata.txt

Comments

Stefano Stabellini June 22, 2016, 10:03 a.m. UTC | #1
On Tue, 7 Jun 2016, Julien Grall wrote:
> The new document will help to keep track of each erratum Xen is able to
> handle.
> 
> The text is based on the Linux doc in Documents/arm64/silicon-errata.txt.
> 
> Also list the current errata that Xen is aware of.
> 
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> 
> ---
>     Changes in v3:
>         - Fix grammar in the commit message
>         - s/Linux/Xen/
>         - Mention that runtime patching is only supported by ARM64
> ---
>  docs/misc/arm/silicon-errata.txt | 45 ++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 45 insertions(+)
>  create mode 100644 docs/misc/arm/silicon-errata.txt
> 
> diff --git a/docs/misc/arm/silicon-errata.txt b/docs/misc/arm/silicon-errata.txt
> new file mode 100644
> index 0000000..374a63a
> --- /dev/null
> +++ b/docs/misc/arm/silicon-errata.txt
> @@ -0,0 +1,45 @@
> +                Silicon Errata and Software Workarounds
> +                =======================================
> +
> +It is an unfortunate fact of life that hardware is often produced with
> +so-called "errata", which can cause it to deviate from the architecture
> +under specific circumstances.  For hardware produced by ARM, these
> +errata are broadly classified into the following categories:
> +
> +  Category A: A critical error without a viable workaround.
> +  Category B: A significant or critical error with an acceptable
> +              workaround.
> +  Category C: A minor error that is not expected to occur under normal
> +              operation.
> +
> +For more information, consult one of the "Software Developers Errata
> +Notice" documents available on infocenter.arm.com (registration
> +required).
> +
> +As far as Xen is concerned, Category B errata may require some special
> +treatment in the hypervisor. For example, avoiding a particular sequence
> +of code, or configuring the processor in a particular way. A less common
> +situation may require similar actions in order to declassify a Category A
> +erratum into a Category C erratum. These are collectively known as
> +"software workarounds" and are only required in the minority of cases
> +(e.g. those cases that both require a non-secure workaround *and* can
> +be triggered by Xen).
> +
> +For software workarounds that may adversely impact systems unaffected by
> +the erratum in question, a Kconfig entry is added under "ARM errata
> +workarounds via the alternatives framework". These are enabled by default
> +and patched in at runtime when an affected CPU is detected. Note that
> +runtime patching is only supported by ARM64. For less-intrusive workarounds,

I think it is more correct to say "supported on ARM64", because it is
not ARM64 which has support for it but Xen when runs on it.
Alternatively "supported by Xen on ARM64".

With this small issue fixed:

Acked-by: Stefano Stabellini <sstabellini@kernel.org>


> +a Kconfig option is not available and the code is structured (preferably
> +with a comment) in such a way that the erratum will not be hit.
> +
> +This approach can make it slightly onerous to determine exactly which
> +errata are worked around in an arbitrary hypervisor source tree, so this
> +file acts as a registry of software workarounds in the Xen hypervisor and
> +will be updated when new workarounds are committed and backported to
> +stable hypervisors.
> +
> +| Implementor    | Component       | Erratum ID      | Kconfig                 |
> ++----------------+-----------------+-----------------+-------------------------+
> +| ARM            | Cortex-A15      | #766422         | N/A                     |
> +| ARM            | Cortex-A57      | #852523         | N/A                     |
> -- 
> 1.9.1
>
diff mbox

Patch

diff --git a/docs/misc/arm/silicon-errata.txt b/docs/misc/arm/silicon-errata.txt
new file mode 100644
index 0000000..374a63a
--- /dev/null
+++ b/docs/misc/arm/silicon-errata.txt
@@ -0,0 +1,45 @@ 
+                Silicon Errata and Software Workarounds
+                =======================================
+
+It is an unfortunate fact of life that hardware is often produced with
+so-called "errata", which can cause it to deviate from the architecture
+under specific circumstances.  For hardware produced by ARM, these
+errata are broadly classified into the following categories:
+
+  Category A: A critical error without a viable workaround.
+  Category B: A significant or critical error with an acceptable
+              workaround.
+  Category C: A minor error that is not expected to occur under normal
+              operation.
+
+For more information, consult one of the "Software Developers Errata
+Notice" documents available on infocenter.arm.com (registration
+required).
+
+As far as Xen is concerned, Category B errata may require some special
+treatment in the hypervisor. For example, avoiding a particular sequence
+of code, or configuring the processor in a particular way. A less common
+situation may require similar actions in order to declassify a Category A
+erratum into a Category C erratum. These are collectively known as
+"software workarounds" and are only required in the minority of cases
+(e.g. those cases that both require a non-secure workaround *and* can
+be triggered by Xen).
+
+For software workarounds that may adversely impact systems unaffected by
+the erratum in question, a Kconfig entry is added under "ARM errata
+workarounds via the alternatives framework". These are enabled by default
+and patched in at runtime when an affected CPU is detected. Note that
+runtime patching is only supported by ARM64. For less-intrusive workarounds,
+a Kconfig option is not available and the code is structured (preferably
+with a comment) in such a way that the erratum will not be hit.
+
+This approach can make it slightly onerous to determine exactly which
+errata are worked around in an arbitrary hypervisor source tree, so this
+file acts as a registry of software workarounds in the Xen hypervisor and
+will be updated when new workarounds are committed and backported to
+stable hypervisors.
+
+| Implementor    | Component       | Erratum ID      | Kconfig                 |
++----------------+-----------------+-----------------+-------------------------+
+| ARM            | Cortex-A15      | #766422         | N/A                     |
+| ARM            | Cortex-A57      | #852523         | N/A                     |