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banners=-,-,- X-VirusChecked: Checked Received: (qmail 6013 invoked from network); 30 Jun 2016 18:44:57 -0000 Received: from mx01.bbu.dsd.mx.bitdefender.com (HELO mx01.bbu.dsd.mx.bitdefender.com) (91.199.104.161) by server-3.tower-21.messagelabs.com with DHE-RSA-AES128-GCM-SHA256 encrypted SMTP; 30 Jun 2016 18:44:57 -0000 Received: (qmail 23120 invoked from network); 30 Jun 2016 21:44:56 +0300 Received: from unknown (HELO mx-sr.buh.bitdefender.com) (10.17.80.103) by mx01.bbu.dsd.mx.bitdefender.com with AES256-GCM-SHA384 encrypted SMTP; 30 Jun 2016 21:44:56 +0300 Received: from smtp02.buh.bitdefender.net (unknown [10.17.80.76]) by mx-sr.buh.bitdefender.com (Postfix) with ESMTP id 0FE7C7FBF5 for ; Thu, 30 Jun 2016 21:44:56 +0300 (EEST) Received: (qmail 3619 invoked from network); 30 Jun 2016 21:44:56 +0300 Received: from 188-24-82-29.rdsnet.ro (HELO localhost.localdomain) (czuzu@bitdefender.com@188.24.82.29) by smtp02.buh.bitdefender.net with SMTP; 30 Jun 2016 21:44:55 +0300 From: Corneliu ZUZU To: xen-devel@lists.xen.org Date: Thu, 30 Jun 2016 21:44:49 +0300 Message-Id: <1467312289-3054-1-git-send-email-czuzu@bitdefender.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1467312015-2867-1-git-send-email-czuzu@bitdefender.com> References: <1467312015-2867-1-git-send-email-czuzu@bitdefender.com> X-BitDefender-Scanner: Clean, Agent: BitDefender qmail 3.1.6 on smtp02.buh.bitdefender.net, sigver: 7.66124 X-BitDefender-Spam: No (0) X-BitDefender-SpamStamp: Build: [Engines: 2.15.6.911, Dats: 425113, Stamp: 3], Multi: [Enabled, t: (0.000011, 0.005367)], BW: [Enabled, t: (0.000007,0.000002)], RBL DNSBL: [Disabled], APM: [Enabled, Score: 500, t: (0.004471), Flags: BB9BAF5C; NN_NO_CONTENT_TYPE; NN_LEGIT_SUMM_400_WORDS; NN_NO_LINK_NMD; NN_LEGIT_BITDEFENDER; NN_LEGIT_S_SQARE_BRACKETS; NN_LEGIT_MAILING_LIST_TO], SGN: [Enabled, t: (0.009541)], URL: [Enabled, t: (0.000005)], RTDA: [Enabled, t: (0.591423), Hit: No, Details: v2.3.10; Id: 2m1ghhh.1amgksteg.1cti], total: 0(775) X-BitDefender-CF-Stamp: none Cc: Andrew Cooper , Jan Beulich Subject: [Xen-devel] [PATCH 4/8] x86/vm-event/monitor: turn monitor_write_data.do_write into enum X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP After trapping a control-register write vm-event and -until- deciding if that write is to be permitted or not (VM_EVENT_FLAG_DENY) and doing the actual write, there cannot and should not be another trapped control-register write event. That is, currently -only one- of the fields of monitor_write_data.do_write can be true at any given moment and therefore it would be more appropriate to replace those fields with an enum value. Signed-off-by: Corneliu ZUZU Acked-by: Razvan Cojocaru --- xen/arch/x86/hvm/hvm.c | 18 +++++++++++------- xen/arch/x86/monitor.c | 37 ++++++++++++++++++------------------- xen/arch/x86/vm_event.c | 25 ++----------------------- xen/include/asm-x86/domain.h | 20 ++++++++++---------- 4 files changed, 41 insertions(+), 59 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 5481a6e..884ae40 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -2186,8 +2186,9 @@ int hvm_set_cr0(unsigned long value, bool_t may_defer) * The actual write will occur in arch_monitor_write_data(), if * permitted. */ - v->arch.vm_event->write_data.do_write.cr0 = 1; - v->arch.vm_event->write_data.cr0 = value; + ASSERT(MWS_NOWRITE == v->arch.vm_event->write_data.status); + v->arch.vm_event->write_data.status = MWS_CR0; + v->arch.vm_event->write_data.value = value; return X86EMUL_OKAY; } @@ -2291,8 +2292,9 @@ int hvm_set_cr3(unsigned long value, bool_t may_defer) * The actual write will occur in arch_monitor_write_data(), if * permitted. */ - v->arch.vm_event->write_data.do_write.cr3 = 1; - v->arch.vm_event->write_data.cr3 = value; + ASSERT(MWS_NOWRITE == v->arch.vm_event->write_data.status); + v->arch.vm_event->write_data.status = MWS_CR3; + v->arch.vm_event->write_data.value = value; return X86EMUL_OKAY; } @@ -2374,8 +2376,9 @@ int hvm_set_cr4(unsigned long value, bool_t may_defer) * The actual write will occur in arch_monitor_write_data(), if * permitted. */ - v->arch.vm_event->write_data.do_write.cr4 = 1; - v->arch.vm_event->write_data.cr4 = value; + ASSERT(MWS_NOWRITE == v->arch.vm_event->write_data.status); + v->arch.vm_event->write_data.status = MWS_CR4; + v->arch.vm_event->write_data.value = value; return X86EMUL_OKAY; } @@ -3756,7 +3759,8 @@ int hvm_msr_write_intercept(unsigned int msr, uint64_t msr_content, * The actual write will occur in arch_monitor_write_data(), if * permitted. */ - v->arch.vm_event->write_data.do_write.msr = 1; + ASSERT(MWS_NOWRITE == v->arch.vm_event->write_data.status); + v->arch.vm_event->write_data.status = MWS_MSR; v->arch.vm_event->write_data.msr = msr; v->arch.vm_event->write_data.value = msr_content; diff --git a/xen/arch/x86/monitor.c b/xen/arch/x86/monitor.c index 90e4856..5c8d4da 100644 --- a/xen/arch/x86/monitor.c +++ b/xen/arch/x86/monitor.c @@ -53,29 +53,28 @@ void arch_monitor_write_data(struct vcpu *v) w = &v->arch.vm_event->write_data; - if ( w->do_write.msr ) - { - hvm_msr_write_intercept(w->msr, w->value, 0); - w->do_write.msr = 0; - } - - if ( w->do_write.cr0 ) - { - hvm_set_cr0(w->cr0, 0); - w->do_write.cr0 = 0; - } + if ( likely(MWS_NOWRITE == w->status) ) + return; - if ( w->do_write.cr4 ) + switch ( w->status ) { - hvm_set_cr4(w->cr4, 0); - w->do_write.cr4 = 0; + case MWS_MSR: + hvm_msr_write_intercept(w->msr, w->value, 0); + break; + case MWS_CR0: + hvm_set_cr0(w->value, 0); + break; + case MWS_CR3: + hvm_set_cr3(w->value, 0); + break; + case MWS_CR4: + hvm_set_cr4(w->value, 0); + break; + default: + break; } - if ( w->do_write.cr3 ) - { - hvm_set_cr3(w->cr3, 0); - w->do_write.cr3 = 0; - } + w->status = MWS_NOWRITE; } static unsigned long *monitor_bitmap_for_msr(const struct domain *d, u32 *msr) diff --git a/xen/arch/x86/vm_event.c b/xen/arch/x86/vm_event.c index 80f84d6..825da48 100644 --- a/xen/arch/x86/vm_event.c +++ b/xen/arch/x86/vm_event.c @@ -73,34 +73,13 @@ void vm_event_register_write_resume(struct vcpu *v, vm_event_response_t *rsp) { if ( rsp->flags & VM_EVENT_FLAG_DENY ) { - struct monitor_write_data *w = &v->arch.vm_event->write_data; - - ASSERT(w); + ASSERT(v->arch.vm_event); /* deny flag requires the vCPU to be paused */ if ( !atomic_read(&v->vm_event_pause_count) ) return; - switch ( rsp->reason ) - { - case VM_EVENT_REASON_MOV_TO_MSR: - w->do_write.msr = 0; - break; - case VM_EVENT_REASON_WRITE_CTRLREG: - switch ( rsp->u.write_ctrlreg.index ) - { - case VM_EVENT_X86_CR0: - w->do_write.cr0 = 0; - break; - case VM_EVENT_X86_CR3: - w->do_write.cr3 = 0; - break; - case VM_EVENT_X86_CR4: - w->do_write.cr4 = 0; - break; - } - break; - } + v->arch.vm_event->write_data.status = MWS_NOWRITE; } } diff --git a/xen/include/asm-x86/domain.h b/xen/include/asm-x86/domain.h index 7c27f9e..a22ee6b 100644 --- a/xen/include/asm-x86/domain.h +++ b/xen/include/asm-x86/domain.h @@ -259,19 +259,19 @@ struct pv_domain struct cpuidmasks *cpuidmasks; }; -struct monitor_write_data { - struct { - unsigned int msr : 1; - unsigned int cr0 : 1; - unsigned int cr3 : 1; - unsigned int cr4 : 1; - } do_write; +enum monitor_write_status +{ + MWS_NOWRITE = 0, + MWS_MSR, + MWS_CR0, + MWS_CR3, + MWS_CR4, +}; +struct monitor_write_data { + enum monitor_write_status status; uint32_t msr; uint64_t value; - uint64_t cr0; - uint64_t cr3; - uint64_t cr4; }; struct arch_domain