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[v2,17/20] xen/arm32: Add an helper to invalidate all instruction caches

Message ID 1472132255-23470-18-git-send-email-konrad.wilk@oracle.com (mailing list archive)
State New, archived
Headers show

Commit Message

Konrad Rzeszutek Wilk Aug. 25, 2016, 1:37 p.m. UTC
This is exactly like commit fb9d877a9c0f3d4d15db8f6e0c5506ea641862c6
"xen/arm64: Add an helper to invalidate all instruction caches"
except it is on ARM32 side.

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>

---
Cc: Julien Grall <julien.grall@arm.com>
Cc: Stefano Stabellini <sstabellini@kernel.org>

v2: First submission
---
 xen/include/asm-arm/arm32/page.h | 6 ++++++
 1 file changed, 6 insertions(+)
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Patch

diff --git a/xen/include/asm-arm/arm32/page.h b/xen/include/asm-arm/arm32/page.h
index bccdbfc..26184ec 100644
--- a/xen/include/asm-arm/arm32/page.h
+++ b/xen/include/asm-arm/arm32/page.h
@@ -29,6 +29,12 @@  static inline void write_pte(lpae_t *p, lpae_t pte)
  * inline asm operand) */
 #define __clean_and_invalidate_dcache_one(R) STORE_CP32(R, DCCIMVAC)
 
+/* Invalidate all instruction caches in Inner Shareable domain to PoU */
+static inline void invalidate_icache(void)
+{
+    asm volatile (CMD_CP32(ICIALLUIS));
+}
+
 /*
  * Flush all hypervisor mappings from the TLB and branch predictor of
  * the local processor.