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Thu, 25 Aug 2016 06:37:58 -0700 From: Konrad Rzeszutek Wilk To: xen-devel@lists.xenproject.org, konrad@kernel.org, ross.lagerwall@citrix.com, sstabellini@kernel.org, julien.grall@arm.com Date: Thu, 25 Aug 2016 09:37:32 -0400 Message-Id: <1472132255-23470-18-git-send-email-konrad.wilk@oracle.com> X-Mailer: git-send-email 2.4.11 In-Reply-To: <1472132255-23470-1-git-send-email-konrad.wilk@oracle.com> References: <1472132255-23470-1-git-send-email-konrad.wilk@oracle.com> X-Source-IP: userv0021.oracle.com [156.151.31.71] Cc: Konrad Rzeszutek Wilk Subject: [Xen-devel] [PATCH v2 17/20] xen/arm32: Add an helper to invalidate all instruction caches X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This is exactly like commit fb9d877a9c0f3d4d15db8f6e0c5506ea641862c6 "xen/arm64: Add an helper to invalidate all instruction caches" except it is on ARM32 side. Signed-off-by: Konrad Rzeszutek Wilk --- Cc: Julien Grall Cc: Stefano Stabellini v2: First submission --- xen/include/asm-arm/arm32/page.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/xen/include/asm-arm/arm32/page.h b/xen/include/asm-arm/arm32/page.h index bccdbfc..26184ec 100644 --- a/xen/include/asm-arm/arm32/page.h +++ b/xen/include/asm-arm/arm32/page.h @@ -29,6 +29,12 @@ static inline void write_pte(lpae_t *p, lpae_t pte) * inline asm operand) */ #define __clean_and_invalidate_dcache_one(R) STORE_CP32(R, DCCIMVAC) +/* Invalidate all instruction caches in Inner Shareable domain to PoU */ +static inline void invalidate_icache(void) +{ + asm volatile (CMD_CP32(ICIALLUIS)); +} + /* * Flush all hypervisor mappings from the TLB and branch predictor of * the local processor.