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Thu, 25 Aug 2016 06:37:59 -0700 From: Konrad Rzeszutek Wilk To: xen-devel@lists.xenproject.org, konrad@kernel.org, ross.lagerwall@citrix.com, sstabellini@kernel.org, julien.grall@arm.com Date: Thu, 25 Aug 2016 09:37:33 -0400 Message-Id: <1472132255-23470-19-git-send-email-konrad.wilk@oracle.com> X-Mailer: git-send-email 2.4.11 In-Reply-To: <1472132255-23470-1-git-send-email-konrad.wilk@oracle.com> References: <1472132255-23470-1-git-send-email-konrad.wilk@oracle.com> X-Source-IP: aserv0022.oracle.com [141.146.126.234] Cc: Konrad Rzeszutek Wilk Subject: [Xen-devel] [PATCH v2 18/20] xen/arm32/livepatch: Add BPICALLIS to helper to invalidate all instruction caches X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP When we are flushing the cache we are most likley also want to flush the branch predictor too. Hence add this. Suggested-by: Julien Grall Signed-off-by: Konrad Rzeszutek Wilk --- Cc: Julien Grall Cc: Stefano Stabellini v2: First submission --- xen/arch/arm/livepatch.c | 3 +++ xen/include/asm-arm/arm32/page.h | 5 ++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/livepatch.c b/xen/arch/arm/livepatch.c index c290602..cdb8d65 100644 --- a/xen/arch/arm/livepatch.c +++ b/xen/arch/arm/livepatch.c @@ -45,6 +45,9 @@ void arch_livepatch_revive(void) /* * Nuke the instruction cache. Data cache has been cleaned before in * arch_livepatch_apply_jmp. + * + * Need to flush the branch predictor for ARMv7 as it may be + * architecturally visible to the software (see B2.2.4 in ARM DDI 0406C.b). */ invalidate_icache(); diff --git a/xen/include/asm-arm/arm32/page.h b/xen/include/asm-arm/arm32/page.h index 26184ec..6caf596 100644 --- a/xen/include/asm-arm/arm32/page.h +++ b/xen/include/asm-arm/arm32/page.h @@ -32,7 +32,10 @@ static inline void write_pte(lpae_t *p, lpae_t pte) /* Invalidate all instruction caches in Inner Shareable domain to PoU */ static inline void invalidate_icache(void) { - asm volatile (CMD_CP32(ICIALLUIS)); + asm volatile ( + CMD_CP32(ICIALLUIS) /* Flush I-cache. */ + CMD_CP32(BPIALLIS) /* Flush branch predictor. */ + : : : "memory"); } /*