From patchwork Sun Oct 9 08:20:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: He Chen X-Patchwork-Id: 9368403 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 59D9060487 for ; Sun, 9 Oct 2016 08:24:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 44F5128E2D for ; Sun, 9 Oct 2016 08:24:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3917428E4E; Sun, 9 Oct 2016 08:24:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7D50028E2D for ; Sun, 9 Oct 2016 08:24:57 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bt9Mq-0000ql-2T; Sun, 09 Oct 2016 08:21:56 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bt9Mp-0000qf-FP for xen-devel@lists.xenproject.org; Sun, 09 Oct 2016 08:21:55 +0000 Received: from [85.158.139.211] by server-14.bemta-5.messagelabs.com id 0E/5D-11508-22EF9F75; Sun, 09 Oct 2016 08:21:54 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrELMWRWlGSWpSXmKPExsVywNwkQlf+389 wg2nrxS2+b5nM5MDocfjDFZYAxijWzLyk/IoE1oxnXdeZC666Vnx/+ZylgfG3WRcjJ4eQQIVE x7WFrCC2hACvxJFlM6BsP4l1Uy6xdzFyAdW0MkrM/7qAsYuRg4NNQF1iwuwykBoRASWJe6smM 4HUMAtsZpS4+mgyO0hCWMBb4t6idjYQm0VAVeLkzgfMIDavgLtE68ydUAvkJG6e62SewMi9gJ FhFaNGcWpRWWqRrqGpXlJRZnpGSW5iZo6uoYGpXm5qcXFiempOYlKxXnJ+7iZGoH8ZgGAHY8N 2z0OMkhxMSqK8iSd+hAvxJeWnVGYkFmfEF5XmpBYfYpTh4FCS4DX98zNcSLAoNT21Ii0zBxho MGkJDh4lEd5pv4DSvMUFibnFmekQqVOMuhxbFtxYyyTEkpeflyolzpsKMkMApCijNA9uBCzoL zHKSgnzMgIdJcRTkFqUm1mCKv+KUZyDUUmY1xZkCk9mXgncpldARzABHcGy+AfIESWJCCmpBs aJpZOemj3I2vXru9iqQ+aSHySWrOJXfGz/fm7pzn8v/r/l37ghPsiotmZf94avFisMzsiJ6ma 3O7RazdBJ2xT5WOsGX+y5V19lve+yfVjbq1pzcM/f6/eeZBXO5ihLNlt204/Jk6FobYVShbaA olPEdj0zGb3qriB9YZP2WPsXfq9XfWaJfqXEUpyRaKjFXFScCABmx9IrdQIAAA== X-Env-Sender: he.chen@linux.intel.com X-Msg-Ref: server-16.tower-206.messagelabs.com!1476001309!48031205!1 X-Originating-IP: [192.55.52.88] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTkyLjU1LjUyLjg4ID0+IDM3NDcyNQ==\n X-StarScan-Received: X-StarScan-Version: 8.84; banners=-,-,- X-VirusChecked: Checked Received: (qmail 28569 invoked from network); 9 Oct 2016 08:21:51 -0000 Received: from mga01.intel.com (HELO mga01.intel.com) (192.55.52.88) by server-16.tower-206.messagelabs.com with DHE-RSA-CAMELLIA256-SHA encrypted SMTP; 9 Oct 2016 08:21:50 -0000 Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP; 09 Oct 2016 01:21:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,465,1473145200"; d="scan'208";a="18169129" Received: from he.bj.intel.com (HELO localhost) ([10.238.135.151]) by orsmga004.jf.intel.com with ESMTP; 09 Oct 2016 01:21:46 -0700 From: He Chen To: xen-devel@lists.xenproject.org Date: Sun, 9 Oct 2016 16:20:48 +0800 Message-Id: <1476001248-14277-1-git-send-email-he.chen@linux.intel.com> X-Mailer: git-send-email 2.7.4 Cc: Andrew Cooper , Paul Lai , Feng Wu , Jan Beulich , He Chao Subject: [Xen-devel] [PATCH v7] xen/sm{e, a}p: allow disabling sm{e, a}p for Xen itself X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: He Chao SMEP/SMAP is a security feature to prevent kernel executing/accessing user address involuntarily, any such behavior will lead to a page fault. SMEP/SMAP is open (in CR4) for both Xen and HVM guest in earlier code. SMEP/SMAP bit set in Xen CR4 would enforce security checking for 32-bit PV guest which will suffer unknown SMEP/SMAP page fault when guest kernel attempt to access user address although SMEP/SMAP is close for PV guests. This patch introduces a new boot option value "hvm" for "sm{e,a}p", it is going to diable SMEP/SMAP for Xen hypervisor while enable them for HVM. In this way, 32-bit PV guest will not suffer SMEP/SMAP security issue. Users can choose whether open SMEP/SMAP for Xen itself, especially when they are going to run 32-bit PV guests. Signed-off-by: He Chen --- Changes in v7: * bugfix: fix the bug that this patch doesn't work on machine without SMAP. * test: This patch has not been tested (on 32-bit PV environment). Really sorry for that since I have took several days trying to setup a 32-bit PV guest but finally failed. Changes in v6: * fix sm{e,a}p parameters parser flow. Changes in v5: * refine sm{e,a}p parameters parser flow. * replace cpu_has_sm{e,a}p with boot_cpu_has(X86_FEATURE_XEN_SM{E,A}P). * refine docs. Changes in v4: * introduce 2 new synthetic features X86_FEATURE_XEN_SMEP and X86_FEATURE_XEN_SMAP for Xen itself. * adjust SM{E,A}P related instruction patching code. * commit message refinement. Changes in v3: * fix boot options. * fix CR4 & mmu_cr4_features operations. * disable SMEP/SMAP for Dom0. * commit message refinement. Changes in v2: * allow "hvm" as a value to "smep" and "smap" command line options. * clear SMEP/SMAP CPUID bits for pv guests if they are set to hvm only. * refine docs. * rewrite commit message. --- docs/misc/xen-command-line.markdown | 10 +++--- xen/arch/x86/setup.c | 72 ++++++++++++++++++++++++++++++------- xen/include/asm-x86/asm_defns.h | 10 +++--- xen/include/asm-x86/cpufeature.h | 2 ++ 4 files changed, 73 insertions(+), 21 deletions(-) diff --git a/docs/misc/xen-command-line.markdown b/docs/misc/xen-command-line.markdown index 8ff57fa..b06b6ac 100644 --- a/docs/misc/xen-command-line.markdown +++ b/docs/misc/xen-command-line.markdown @@ -1433,19 +1433,21 @@ enabling more sockets and cores to go into deeper sleep states. Set the serial transmit buffer size. -### smep +### smap > `= ` > Default: `true` -Flag to enable Supervisor Mode Execution Protection +Flag to enable Supervisor Mode Access Prevention +Use `smap=hvm` to allow SMAP use by HVM guests only. -### smap +### smep > `= ` > Default: `true` -Flag to enable Supervisor Mode Access Prevention +Flag to enable Supervisor Mode Execution Protection +Use `smep=hvm` to allow SMEP use by HVM guests only. ### snb\_igd\_quirk > `= | cap | ` diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 8ae897a..f3ed247 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -61,14 +61,6 @@ boolean_param("nosmp", opt_nosmp); static unsigned int __initdata max_cpus; integer_param("maxcpus", max_cpus); -/* smep: Enable/disable Supervisor Mode Execution Protection (default on). */ -static bool_t __initdata opt_smep = 1; -boolean_param("smep", opt_smep); - -/* smap: Enable/disable Supervisor Mode Access Prevention (default on). */ -static bool_t __initdata opt_smap = 1; -boolean_param("smap", opt_smap); - unsigned long __read_mostly cr4_pv32_mask; /* Boot dom0 in pvh mode */ @@ -112,6 +104,58 @@ struct cpuinfo_x86 __read_mostly boot_cpu_data = { 0, 0, 0, 0, -1 }; unsigned long __read_mostly mmu_cr4_features = XEN_MINIMAL_CR4; +/* smep: Enable/disable Supervisor Mode Execution Protection (default on). */ +#define SMEP_HVM_ONLY (-1) +static s8 __initdata opt_smep = 1; +static void __init parse_smep_param(char *s) +{ + if ( !*s ) + { + opt_smep = 1; + return; + } + + switch ( parse_bool(s) ) + { + case 0: + opt_smep = 0; + return; + case 1: + opt_smep = 1; + return; + } + + if ( !strcmp(s, "hvm") ) + opt_smep = SMEP_HVM_ONLY; +} +custom_param("smep", parse_smep_param); + +/* smap: Enable/disable Supervisor Mode Access Prevention (default on). */ +#define SMAP_HVM_ONLY (-1) +static s8 __initdata opt_smap = 1; +static void __init parse_smap_param(char *s) +{ + if ( !*s ) + { + opt_smap = 1; + return; + } + + switch ( parse_bool(s) ) + { + case 0: + opt_smap = 0; + return; + case 1: + opt_smap = 1; + return; + } + + if ( !strcmp(s, "hvm") ) + opt_smap = SMAP_HVM_ONLY; +} +custom_param("smap", parse_smap_param); + bool_t __read_mostly acpi_disabled; bool_t __initdata acpi_force; static char __initdata acpi_param[10] = ""; @@ -1404,12 +1448,16 @@ void __init noreturn __start_xen(unsigned long mbi_p) if ( !opt_smep ) setup_clear_cpu_cap(X86_FEATURE_SMEP); - if ( cpu_has_smep ) + else if ( cpu_has_smep && opt_smep == 1 ) + __set_bit(X86_FEATURE_XEN_SMEP, boot_cpu_data.x86_capability); + if ( boot_cpu_has(X86_FEATURE_XEN_SMEP) ) set_in_cr4(X86_CR4_SMEP); if ( !opt_smap ) setup_clear_cpu_cap(X86_FEATURE_SMAP); - if ( cpu_has_smap ) + else if ( cpu_has_smap && opt_smap == 1 ) + __set_bit(X86_FEATURE_XEN_SMAP, boot_cpu_data.x86_capability); + if ( boot_cpu_has(X86_FEATURE_XEN_SMAP) ) set_in_cr4(X86_CR4_SMAP); cr4_pv32_mask = mmu_cr4_features & XEN_CR4_PV32_BITS; @@ -1551,7 +1599,7 @@ void __init noreturn __start_xen(unsigned long mbi_p) * This saves a large number of corner cases interactions with * copy_from_user(). */ - if ( cpu_has_smap ) + if ( boot_cpu_has(X86_FEATURE_XEN_SMAP) ) { cr4_pv32_mask &= ~X86_CR4_SMAP; write_cr4(read_cr4() & ~X86_CR4_SMAP); @@ -1571,7 +1619,7 @@ void __init noreturn __start_xen(unsigned long mbi_p) bootstrap_map, cmdline) != 0) panic("Could not set up DOM0 guest OS"); - if ( cpu_has_smap ) + if ( boot_cpu_has(X86_FEATURE_XEN_SMAP) ) { write_cr4(read_cr4() | X86_CR4_SMAP); cr4_pv32_mask |= X86_CR4_SMAP; diff --git a/xen/include/asm-x86/asm_defns.h b/xen/include/asm-x86/asm_defns.h index e36e78f..f1c6fa1 100644 --- a/xen/include/asm-x86/asm_defns.h +++ b/xen/include/asm-x86/asm_defns.h @@ -205,7 +205,7 @@ void ret_from_intr(void); .popsection; \ .pushsection .altinstructions, "a"; \ altinstruction_entry 661b, 661b, X86_FEATURE_ALWAYS, 3, 0; \ - altinstruction_entry 661b, 662b, X86_FEATURE_SMAP, 3, 3; \ + altinstruction_entry 661b, 662b, X86_FEATURE_XEN_SMAP, 3, 3; \ .popsection #define ASM_STAC ASM_AC(STAC) @@ -217,21 +217,21 @@ void ret_from_intr(void); 668: call cr4_pv32_restore; \ .section .altinstructions, "a"; \ altinstruction_entry 667b, 667b, X86_FEATURE_ALWAYS, 5, 0; \ - altinstruction_entry 667b, 668b, X86_FEATURE_SMEP, 5, 5; \ - altinstruction_entry 667b, 668b, X86_FEATURE_SMAP, 5, 5; \ + altinstruction_entry 667b, 668b, X86_FEATURE_XEN_SMEP, 5, 5; \ + altinstruction_entry 667b, 668b, X86_FEATURE_XEN_SMAP, 5, 5; \ .popsection #else static always_inline void clac(void) { /* Note: a barrier is implicit in alternative() */ - alternative(ASM_NOP3, __stringify(__ASM_CLAC), X86_FEATURE_SMAP); + alternative(ASM_NOP3, __stringify(__ASM_CLAC), X86_FEATURE_XEN_SMAP); } static always_inline void stac(void) { /* Note: a barrier is implicit in alternative() */ - alternative(ASM_NOP3, __stringify(__ASM_STAC), X86_FEATURE_SMAP); + alternative(ASM_NOP3, __stringify(__ASM_STAC), X86_FEATURE_XEN_SMAP); } #endif diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index bcdf5d6..287419f 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -17,6 +17,8 @@ XEN_CPUFEATURE(CPUID_FAULTING, (FSCAPINTS+0)*32+ 6) /* cpuid faulting */ XEN_CPUFEATURE(CLFLUSH_MONITOR, (FSCAPINTS+0)*32+ 7) /* clflush reqd with monitor */ XEN_CPUFEATURE(APERFMPERF, (FSCAPINTS+0)*32+ 8) /* APERFMPERF */ XEN_CPUFEATURE(MFENCE_RDTSC, (FSCAPINTS+0)*32+ 9) /* MFENCE synchronizes RDTSC */ +XEN_CPUFEATURE(XEN_SMEP, (FSCAPINTS+0)*32+ 10) /* SMEP gets used by Xen itself */ +XEN_CPUFEATURE(XEN_SMAP, (FSCAPINTS+0)*32+ 11) /* SMAP gets used by Xen itself */ #define NCAPINTS (FSCAPINTS + 1) /* N 32-bit words worth of info */