| Message ID | 1481597376-18175-1-git-send-email-luwei.kang@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
> From: Kang, Luwei > Sent: Tuesday, December 13, 2016 10:50 AM > > just set the corresponding bits of which counter happened overflow, > rather than set all the available bits of IA32_PERF_GLOBAL_OVF_CTRL > when happened pmu interrupt. "when pmu interrupt happens" > > Signed-off-by: Luwei Kang <luwei.kang@intel.com> Acked-by: Kevin Tian <kevin.tian@intel.com>
> > From: Kang, Luwei > > Sent: Tuesday, December 13, 2016 10:50 AM > > > > just set the corresponding bits of which counter happened overflow, > > rather than set all the available bits of IA32_PERF_GLOBAL_OVF_CTRL > > when happened pmu interrupt. > > "when pmu interrupt happens" > When a counter happens overflow. > > > > Signed-off-by: Luwei Kang <luwei.kang@intel.com> > > Acked-by: Kevin Tian <kevin.tian@intel.com>
diff --git a/xen/arch/x86/cpu/vpmu_intel.c b/xen/arch/x86/cpu/vpmu_intel.c index e8049ed..613aafe 100644 --- a/xen/arch/x86/cpu/vpmu_intel.c +++ b/xen/arch/x86/cpu/vpmu_intel.c @@ -868,7 +868,7 @@ static int core2_vpmu_do_interrupt(struct cpu_user_regs *regs) if ( is_pmc_quirk ) handle_pmc_quirk(msr_content); core2_vpmu_cxt->global_status |= msr_content; - msr_content = ~global_ovf_ctrl_mask; + msr_content &= ~global_ovf_ctrl_mask; wrmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, msr_content); } else
just set the corresponding bits of which counter happened overflow, rather than set all the available bits of IA32_PERF_GLOBAL_OVF_CTRL when happened pmu interrupt. Signed-off-by: Luwei Kang <luwei.kang@intel.com> --- v2:modify the description of this patch. --- xen/arch/x86/cpu/vpmu_intel.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)