From patchwork Tue Dec 13 02:49:36 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luwei Kang X-Patchwork-Id: 9471723 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 26C69607EE for ; Tue, 13 Dec 2016 02:53:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0906C28552 for ; Tue, 13 Dec 2016 02:53:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EF34628614; Tue, 13 Dec 2016 02:53:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7C13928552 for ; Tue, 13 Dec 2016 02:53:09 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cGdAv-0002QX-CY; Tue, 13 Dec 2016 02:50:41 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cGdAu-0002QR-EE for xen-devel@lists.xen.org; Tue, 13 Dec 2016 02:50:40 +0000 Received: from [85.158.139.211] by server-2.bemta-5.messagelabs.com id F0/76-08512-FF16F485; Tue, 13 Dec 2016 02:50:39 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrELMWRWlGSWpSXmKPExsVywNykQvdvon+ EwdpZfBZLPi5mcWD0OLr7N1MAYxRrZl5SfkUCa8a5rc9ZC2awV6xfd4ytgfEXaxcjJ4eQQIXE /Z5zTCC2hACvxJFlM1gh7ACJpQu6GCFqqiTmvdsDZrMJqEtsfb8RrEZEQFri2ufLQHEuDmaBV kaJS50NYIOEBSIlJnbOYgexWQRUJc41HQeL8wq4SHxsPQC1QE7i5rlO5gmM3AsYGVYxahSnFp WlFukaGuslFWWmZ5TkJmbm6BoamOrlphYXJ6an5iQmFesl5+duYgT6lwEIdjD+2+Z5iFGSg0l JlNc8xj9CiC8pP6UyI7E4I76oNCe1+BCjDAeHkgTvjVignGBRanpqRVpmDjDQYNISHDxKIrzB IK28xQWJucWZ6RCpU4y6HAfer3jKJMSSl5+XKiXO6wYyQwCkKKM0D24ELOgvMcpKCfMyAh0lx FOQWpSbWYIq/4pRnINRSZg3B2QKT2ZeCdymV0BHMAEd8XyfN8gRJYkIKakGxuz1+WsZ1cNkbp m1L4q+GpPFdXjmz7/L17RKzj+pWW1pJLvd86dK9Eb52eV7Lh9gXrD8U8wzoXyx9457prUH5et qbeO+HPNf2UfmmN+9vKavX9fnFmg93i0745H0lXcLaybtdrJ6KL3gdzHjYvWTX5ttz9R5zROw jt68cfuS3KkvmEMv26RIT1RiKc5INNRiLipOBABcfQf5dQIAAA== X-Env-Sender: luwei.kang@intel.com X-Msg-Ref: server-9.tower-206.messagelabs.com!1481597434!75198678!1 X-Originating-IP: [192.55.52.120] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 9.1.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 31681 invoked from network); 13 Dec 2016 02:50:36 -0000 Received: from mga04.intel.com (HELO mga04.intel.com) (192.55.52.120) by server-9.tower-206.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 13 Dec 2016 02:50:36 -0000 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga104.fm.intel.com with ESMTP; 12 Dec 2016 18:50:33 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.33,339,1477983600"; d="scan'208"; a="1071354892" Received: from vmm-dell.bj.intel.com ([10.238.154.151]) by orsmga001.jf.intel.com with ESMTP; 12 Dec 2016 18:50:32 -0800 From: Luwei Kang To: xen-devel@lists.xen.org Date: Tue, 13 Dec 2016 10:49:36 +0800 Message-Id: <1481597376-18175-1-git-send-email-luwei.kang@intel.com> X-Mailer: git-send-email 2.7.4 Cc: andrew.cooper3@citrix.com, kevin.tian@intel.com, Luwei Kang , jun.nakajima@intel.com, jbeulich@suse.com Subject: [Xen-devel] [PATCH v2] X86/VPMU:clear the overflow status of which counter happened overflow X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP just set the corresponding bits of which counter happened overflow, rather than set all the available bits of IA32_PERF_GLOBAL_OVF_CTRL when happened pmu interrupt. Signed-off-by: Luwei Kang Acked-by: Kevin Tian --- v2:modify the description of this patch. --- xen/arch/x86/cpu/vpmu_intel.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/cpu/vpmu_intel.c b/xen/arch/x86/cpu/vpmu_intel.c index e8049ed..613aafe 100644 --- a/xen/arch/x86/cpu/vpmu_intel.c +++ b/xen/arch/x86/cpu/vpmu_intel.c @@ -868,7 +868,7 @@ static int core2_vpmu_do_interrupt(struct cpu_user_regs *regs) if ( is_pmc_quirk ) handle_pmc_quirk(msr_content); core2_vpmu_cxt->global_status |= msr_content; - msr_content = ~global_ovf_ctrl_mask; + msr_content &= ~global_ovf_ctrl_mask; wrmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, msr_content); } else