From patchwork Wed Jan 4 12:39:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Cooper X-Patchwork-Id: 9496653 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E81BC606B5 for ; Wed, 4 Jan 2017 12:47:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DA10D27BE5 for ; Wed, 4 Jan 2017 12:47:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CEC5927F88; Wed, 4 Jan 2017 12:47:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5B84827BE5 for ; Wed, 4 Jan 2017 12:47:55 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cOkxf-0005oc-66; Wed, 04 Jan 2017 12:46:35 +0000 Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cOkxd-0005kD-Ux for xen-devel@lists.xen.org; Wed, 04 Jan 2017 12:46:34 +0000 Received: from [193.109.254.147] by server-3.bemta-6.messagelabs.com id 0F/3D-09053-9AEEC685; Wed, 04 Jan 2017 12:46:33 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpjkeJIrShJLcpLzFFi42JxWrrBXnfFu5w Ig+m/LS2WfFzM4sDocXT3b6YAxijWzLyk/IoE1ozd0/qZC7rVKhYvvMrWwNgi18XIySEh4C/x 99NrZhCbTUBfYveLT0wgtoiAusTpjousXYxcHMwCWxklbu04AlYkLOAocXI2hM0ioCKx6GUbK 4jNK+ApMWPiPUaIoXIS54//BKvhBIo/27gOLC4k4CEx5eIydghbTeJa/yV2iF5BiZMzn7CA2M wCEhIHX7xgnsDIOwtJahaS1AJGplWMGsWpRWWpRbqGJnpJRZnpGSW5iZk5uoYGZnq5qcXFiem pOYlJxXrJ+bmbGIHhwwAEOxivbww4xCjJwaQkytvXnhMhxJeUn1KZkVicEV9UmpNafIhRhoND SYJ3xlugnGBRanpqRVpmDjCQYdISHDxKIrwPQdK8xQWJucWZ6RCpU4yKUuK8S0ASAiCJjNI8u DZY9FxilJUS5mUEOkSIpyC1KDezBFX+FaM4B6OSMO9ekCk8mXklcNNfAS1mAlq8PSAbZHFJIk JKqoHRKmenpHVL+43KwxzuXHoFMXwylvt8O9OststyhXTdk6jbGp/upJd0/wx7rTlvxxO9ma4 7rSZnfrlXe9bu2arrk3J8z1y1F1rg6zaz5XnB98Rv8/bsFwzV41gUr39esOZdxEdlY71SzxMm dp/aynY6by5YuPqzcqNb4oZS3SXTP5+UWByY0anEUpyRaKjFXFScCADWBA9zmQIAAA== X-Env-Sender: prvs=1701003ad=Andrew.Cooper3@citrix.com X-Msg-Ref: server-11.tower-27.messagelabs.com!1483533991!49789778!1 X-Originating-IP: [66.165.176.63] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni42MyA9PiAzMDYwNDg=\n, received_headers: No Received headers X-StarScan-Received: X-StarScan-Version: 9.1.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 54382 invoked from network); 4 Jan 2017 12:46:32 -0000 Received: from smtp02.citrix.com (HELO SMTP02.CITRIX.COM) (66.165.176.63) by server-11.tower-27.messagelabs.com with RC4-SHA encrypted SMTP; 4 Jan 2017 12:46:32 -0000 X-IronPort-AV: E=Sophos;i="5.33,459,1477958400"; d="scan'208";a="406724766" From: Andrew Cooper To: Xen-devel Date: Wed, 4 Jan 2017 12:39:33 +0000 Message-ID: <1483533584-8015-17-git-send-email-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1483533584-8015-1-git-send-email-andrew.cooper3@citrix.com> References: <1483533584-8015-1-git-send-email-andrew.cooper3@citrix.com> MIME-Version: 1.0 Cc: Andrew Cooper , Boris Ostrovsky , Suravee Suthikulpanit , Jan Beulich Subject: [Xen-devel] [PATCH 16/27] x86/svm: Improvements using named features X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This avoids calling into hvm_cpuid() to obtain information which is directly available. In particular, this avoids the need to overload flag_dr_dirty because of hvm_cpuid() being unavailable svm_save_dr() Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Boris Ostrovsky CC: Suravee Suthikulpanit --- xen/arch/x86/hvm/svm/svm.c | 33 ++++++++------------------------- 1 file changed, 8 insertions(+), 25 deletions(-) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index de20f64..8f6737c 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -173,7 +173,7 @@ static void svm_save_dr(struct vcpu *v) v->arch.hvm_vcpu.flag_dr_dirty = 0; vmcb_set_dr_intercepts(vmcb, ~0u); - if ( flag_dr_dirty & 2 ) + if ( v->domain->arch.cpuid->extd.dbext ) { svm_intercept_msr(v, MSR_AMD64_DR0_ADDRESS_MASK, MSR_INTERCEPT_RW); svm_intercept_msr(v, MSR_AMD64_DR1_ADDRESS_MASK, MSR_INTERCEPT_RW); @@ -196,8 +196,6 @@ static void svm_save_dr(struct vcpu *v) static void __restore_debug_registers(struct vmcb_struct *vmcb, struct vcpu *v) { - unsigned int ecx; - if ( v->arch.hvm_vcpu.flag_dr_dirty ) return; @@ -205,8 +203,8 @@ static void __restore_debug_registers(struct vmcb_struct *vmcb, struct vcpu *v) vmcb_set_dr_intercepts(vmcb, 0); ASSERT(v == current); - hvm_cpuid(0x80000001, NULL, NULL, &ecx, NULL); - if ( test_bit(X86_FEATURE_DBEXT & 31, &ecx) ) + + if ( v->domain->arch.cpuid->extd.dbext ) { svm_intercept_msr(v, MSR_AMD64_DR0_ADDRESS_MASK, MSR_INTERCEPT_NONE); svm_intercept_msr(v, MSR_AMD64_DR1_ADDRESS_MASK, MSR_INTERCEPT_NONE); @@ -217,9 +215,6 @@ static void __restore_debug_registers(struct vmcb_struct *vmcb, struct vcpu *v) wrmsrl(MSR_AMD64_DR1_ADDRESS_MASK, v->arch.hvm_svm.dr_mask[1]); wrmsrl(MSR_AMD64_DR2_ADDRESS_MASK, v->arch.hvm_svm.dr_mask[2]); wrmsrl(MSR_AMD64_DR3_ADDRESS_MASK, v->arch.hvm_svm.dr_mask[3]); - - /* Can't use hvm_cpuid() in svm_save_dr(): v != current. */ - v->arch.hvm_vcpu.flag_dr_dirty |= 2; } write_debugreg(0, v->arch.debugreg[0]); @@ -1359,11 +1354,7 @@ static void svm_init_erratum_383(struct cpuinfo_x86 *c) static int svm_handle_osvw(struct vcpu *v, uint32_t msr, uint64_t *val, bool_t read) { - unsigned int ecx; - - /* Guest OSVW support */ - hvm_cpuid(0x80000001, NULL, NULL, &ecx, NULL); - if ( !test_bit((X86_FEATURE_OSVW & 31), &ecx) ) + if ( !v->domain->arch.cpuid->extd.osvw ) return -1; if ( read ) @@ -1622,8 +1613,6 @@ static int svm_msr_read_intercept(unsigned int msr, uint64_t *msr_content) switch ( msr ) { - unsigned int ecx; - case MSR_IA32_SYSENTER_CS: *msr_content = v->arch.hvm_svm.guest_sysenter_cs; break; @@ -1701,15 +1690,13 @@ static int svm_msr_read_intercept(unsigned int msr, uint64_t *msr_content) break; case MSR_AMD64_DR0_ADDRESS_MASK: - hvm_cpuid(0x80000001, NULL, NULL, &ecx, NULL); - if ( !test_bit(X86_FEATURE_DBEXT & 31, &ecx) ) + if ( !v->domain->arch.cpuid->extd.dbext ) goto gpf; *msr_content = v->arch.hvm_svm.dr_mask[0]; break; case MSR_AMD64_DR1_ADDRESS_MASK ... MSR_AMD64_DR3_ADDRESS_MASK: - hvm_cpuid(0x80000001, NULL, NULL, &ecx, NULL); - if ( !test_bit(X86_FEATURE_DBEXT & 31, &ecx) ) + if ( !v->domain->arch.cpuid->extd.dbext ) goto gpf; *msr_content = v->arch.hvm_svm.dr_mask[msr - MSR_AMD64_DR1_ADDRESS_MASK + 1]; @@ -1783,8 +1770,6 @@ static int svm_msr_write_intercept(unsigned int msr, uint64_t msr_content) switch ( msr ) { - unsigned int ecx; - case MSR_IA32_SYSENTER_CS: vmcb->sysenter_cs = v->arch.hvm_svm.guest_sysenter_cs = msr_content; break; @@ -1862,15 +1847,13 @@ static int svm_msr_write_intercept(unsigned int msr, uint64_t msr_content) break; case MSR_AMD64_DR0_ADDRESS_MASK: - hvm_cpuid(0x80000001, NULL, NULL, &ecx, NULL); - if ( !test_bit(X86_FEATURE_DBEXT & 31, &ecx) || (msr_content >> 32) ) + if ( !v->domain->arch.cpuid->extd.dbext || (msr_content >> 32) ) goto gpf; v->arch.hvm_svm.dr_mask[0] = msr_content; break; case MSR_AMD64_DR1_ADDRESS_MASK ... MSR_AMD64_DR3_ADDRESS_MASK: - hvm_cpuid(0x80000001, NULL, NULL, &ecx, NULL); - if ( !test_bit(X86_FEATURE_DBEXT & 31, &ecx) || (msr_content >> 32) ) + if ( !v->domain->arch.cpuid->extd.dbext || (msr_content >> 32) ) goto gpf; v->arch.hvm_svm.dr_mask[msr - MSR_AMD64_DR1_ADDRESS_MASK + 1] = msr_content;