From patchwork Wed Jan 4 12:39:36 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Cooper X-Patchwork-Id: 9496681 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8210D606B5 for ; Wed, 4 Jan 2017 12:48:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7386227F85 for ; Wed, 4 Jan 2017 12:48:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6896327F8D; Wed, 4 Jan 2017 12:48:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D52E727F85 for ; Wed, 4 Jan 2017 12:48:31 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cOkxd-0005ln-V2; Wed, 04 Jan 2017 12:46:33 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cOkxc-0005h5-Lo for xen-devel@lists.xen.org; Wed, 04 Jan 2017 12:46:32 +0000 Received: from [85.158.137.68] by server-3.bemta-3.messagelabs.com id 6B/43-14551-7AEEC685; Wed, 04 Jan 2017 12:46:31 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpikeJIrShJLcpLzFFi42JxWrohUnf5u5w IgzUtUhZLPi5mcWD0OLr7N1MAYxRrZl5SfkUCa0bru0ksBYdtKz5sMmpgXKLVxcjJISHgL/Go 4Q0biM0moC+x+8UnJhBbREBd4nTHRdYuRg4OZgE/iUMPfEHCwgIBEgcPXmIFsVkEVCSOrNrKC GLzCnhKHFr6gQVipJzE+eM/mUFsTqD4s43rwGqEBDwkplxcxg5hq0lc67/EDtErKHFy5hOwXm YBCYmDL14wT2DknYUkNQtJagEj0ypG9eLUorLUIl0TvaSizPSMktzEzBxdQwNjvdzU4uLE9NS cxKRiveT83E2MwLBhAIIdjI1fnA4xSnIwKYny9rXnRAjxJeWnVGYkFmfEF5XmpBYfYpTh4FCS 4BV6C5QTLEpNT61Iy8wBBjBMWoKDR0mENx0kzVtckJhbnJkOkTrFqCglzmsMkhAASWSU5sG1w aLmEqOslDAvI9AhQjwFqUW5mSWo8q8YxTkYlYR5bUCm8GTmlcBNfwW0mAlo8faAbJDFJYkIKa kGRicZTyF/O+tC9v0Jp1WXB0/YXVI5YdGhKp93snfbXdWSc7sWL9S7en+L9db3KuauFwSPrZ/ Uq1JjIKvky7nnzrHPdVapAgLiHC3l/xh6Zc8WSGT2S6/ev8ubUa1ir6yp+qnkbiFRzwtLHzza dFhITvh6xvMeyeTlpWuv7dsm33BwY7Xv2ZdcSizFGYmGWsxFxYkAYsXIBJUCAAA= X-Env-Sender: prvs=1701003ad=Andrew.Cooper3@citrix.com X-Msg-Ref: server-6.tower-31.messagelabs.com!1483533980!52605894!8 X-Originating-IP: [66.165.176.89] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni44OSA9PiAyMDMwMDc=\n, received_headers: No Received headers X-StarScan-Received: X-StarScan-Version: 9.1.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 46899 invoked from network); 4 Jan 2017 12:46:30 -0000 Received: from smtp.citrix.com (HELO SMTP.CITRIX.COM) (66.165.176.89) by server-6.tower-31.messagelabs.com with RC4-SHA encrypted SMTP; 4 Jan 2017 12:46:30 -0000 X-IronPort-AV: E=Sophos;i="5.33,459,1477958400"; d="scan'208";a="397866984" From: Andrew Cooper To: Xen-devel Date: Wed, 4 Jan 2017 12:39:36 +0000 Message-ID: <1483533584-8015-20-git-send-email-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1483533584-8015-1-git-send-email-andrew.cooper3@citrix.com> References: <1483533584-8015-1-git-send-email-andrew.cooper3@citrix.com> MIME-Version: 1.0 Cc: Andrew Cooper , Jan Beulich Subject: [Xen-devel] [PATCH 19/27] x86/hvm: Use per-domain policy information in hvm_cpuid() X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP ... rather than performing runtime adjustments. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich --- xen/arch/x86/hvm/hvm.c | 113 +++++++++++++++++++------------------------------ 1 file changed, 44 insertions(+), 69 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 6a3fdaa..7cda53f 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -3335,39 +3335,33 @@ void hvm_cpuid(unsigned int input, unsigned int *eax, unsigned int *ebx, *ebx &= 0x00FFFFFFu; *ebx |= (v->vcpu_id * 2) << 24; - *ecx &= hvm_featureset[FEATURESET_1c]; - *edx &= hvm_featureset[FEATURESET_1d]; + *ecx = p->basic._1c; + *edx = p->basic._1d; /* APIC exposed to guests, but Fast-forward MSR_APIC_BASE.EN back in. */ if ( vlapic_hw_disabled(vcpu_vlapic(v)) ) *edx &= ~cpufeat_bit(X86_FEATURE_APIC); - /* OSXSAVE cleared by hvm_featureset. Fast-forward CR4 back in. */ + /* OSXSAVE clear in policy. Fast-forward CR4 back in. */ if ( v->arch.hvm_vcpu.guest_cr[4] & X86_CR4_OSXSAVE ) *ecx |= cpufeat_mask(X86_FEATURE_OSXSAVE); - /* Don't expose HAP-only features to non-hap guests. */ - if ( !hap_enabled(d) ) - { - *ecx &= ~cpufeat_mask(X86_FEATURE_PCID); - - /* - * PSE36 is not supported in shadow mode. This bit should be - * unilaterally cleared. - * - * However, an unspecified version of Hyper-V from 2011 refuses - * to start as the "cpu does not provide required hw features" if - * it can't see PSE36. - * - * As a workaround, leak the toolstack-provided PSE36 value into a - * shadow guest if the guest is already using PAE paging (and - * won't care about reverting back to PSE paging). Otherwise, - * knoble it, so a 32bit guest doesn't get the impression that it - * could try to use PSE36 paging. - */ - if ( !(hvm_pae_enabled(v) || hvm_long_mode_enabled(v)) ) - *edx &= ~cpufeat_mask(X86_FEATURE_PSE36); - } + /* + * PSE36 is not supported in shadow mode. This bit should be + * unilaterally cleared. + * + * However, an unspecified version of Hyper-V from 2011 refuses + * to start as the "cpu does not provide required hw features" if + * it can't see PSE36. + * + * As a workaround, leak the toolstack-provided PSE36 value into a + * shadow guest if the guest is already using PAE paging (and won't + * care about reverting back to PSE paging). Otherwise, knoble it, so + * a 32bit guest doesn't get the impression that it could try to use + * PSE36 paging. + */ + if ( !hap_enabled(d) && !(hvm_pae_enabled(v) || hvm_long_mode_enabled(v)) ) + *edx &= ~cpufeat_mask(X86_FEATURE_PSE36); if ( vpmu_enabled(v) && vpmu_is_set(vcpu_vpmu(v), VPMU_CPU_HAS_DS) ) @@ -3384,23 +3378,11 @@ void hvm_cpuid(unsigned int input, unsigned int *eax, unsigned int *ebx, case 0x7: if ( count == 0 ) { - /* Fold host's FDP_EXCP_ONLY and NO_FPU_SEL into guest's view. */ - *ebx &= (hvm_featureset[FEATURESET_7b0] & - ~special_features[FEATURESET_7b0]); - *ebx |= (host_featureset[FEATURESET_7b0] & - special_features[FEATURESET_7b0]); - - *ecx &= hvm_featureset[FEATURESET_7c0]; - *edx &= hvm_featureset[FEATURESET_7d0]; - - /* Don't expose HAP-only features to non-hap guests. */ - if ( !hap_enabled(d) ) - { - *ebx &= ~cpufeat_mask(X86_FEATURE_INVPCID); - *ecx &= ~cpufeat_mask(X86_FEATURE_PKU); - } + *ebx = d->arch.cpuid->feat._7b0; + *ecx = d->arch.cpuid->feat._7c0; + *edx = d->arch.cpuid->feat._7d0; - /* OSPKE cleared by hvm_featureset. Fast-forward CR4 back in. */ + /* OSPKE clear in policy. Fast-forward CR4 back in. */ if ( v->arch.hvm_vcpu.guest_cr[4] & X86_CR4_PKE ) *ecx |= cpufeat_mask(X86_FEATURE_OSPKE); } @@ -3484,7 +3466,7 @@ void hvm_cpuid(unsigned int input, unsigned int *eax, unsigned int *ebx, } case 1: - *eax &= hvm_featureset[FEATURESET_Da1]; + *eax = p->xstate.Da1; if ( p->xstate.xsaves ) { @@ -3516,8 +3498,8 @@ void hvm_cpuid(unsigned int input, unsigned int *eax, unsigned int *ebx, break; case 0x80000001: - *ecx &= hvm_featureset[FEATURESET_e1c]; - *edx &= hvm_featureset[FEATURESET_e1d]; + *ecx = p->extd.e1c; + *edx = p->extd.e1d; /* If not emulating AMD, clear the duplicated features in e1d. */ if ( d->arch.x86_vendor != X86_VENDOR_AMD ) @@ -3526,28 +3508,22 @@ void hvm_cpuid(unsigned int input, unsigned int *eax, unsigned int *ebx, else if ( vlapic_hw_disabled(vcpu_vlapic(v)) ) *edx &= ~cpufeat_bit(X86_FEATURE_APIC); - /* Don't expose HAP-only features to non-hap guests. */ - if ( !hap_enabled(d) ) - { - *edx &= ~cpufeat_mask(X86_FEATURE_PAGE1GB); - - /* - * PSE36 is not supported in shadow mode. This bit should be - * unilaterally cleared. - * - * However, an unspecified version of Hyper-V from 2011 refuses - * to start as the "cpu does not provide required hw features" if - * it can't see PSE36. - * - * As a workaround, leak the toolstack-provided PSE36 value into a - * shadow guest if the guest is already using PAE paging (and - * won't care about reverting back to PSE paging). Otherwise, - * knoble it, so a 32bit guest doesn't get the impression that it - * could try to use PSE36 paging. - */ - if ( !(hvm_pae_enabled(v) || hvm_long_mode_enabled(v)) ) - *edx &= ~cpufeat_mask(X86_FEATURE_PSE36); - } + /* + * PSE36 is not supported in shadow mode. This bit should be + * unilaterally cleared. + * + * However, an unspecified version of Hyper-V from 2011 refuses + * to start as the "cpu does not provide required hw features" if + * it can't see PSE36. + * + * As a workaround, leak the toolstack-provided PSE36 value into a + * shadow guest if the guest is already using PAE paging (and won't + * care about reverting back to PSE paging). Otherwise, knoble it, so + * a 32bit guest doesn't get the impression that it could try to use + * PSE36 paging. + */ + if ( !hap_enabled(d) && !(hvm_pae_enabled(v) || hvm_long_mode_enabled(v)) ) + *edx &= ~cpufeat_mask(X86_FEATURE_PSE36); /* SYSCALL is hidden outside of long mode on Intel. */ if ( d->arch.x86_vendor == X86_VENDOR_INTEL && @@ -3557,8 +3533,7 @@ void hvm_cpuid(unsigned int input, unsigned int *eax, unsigned int *ebx, break; case 0x80000007: - *edx &= (hvm_featureset[FEATURESET_e7d] | - (host_featureset[FEATURESET_e7d] & cpufeat_mask(X86_FEATURE_ITSC))); + *edx = p->extd.e7d; break; case 0x80000008: @@ -3573,7 +3548,7 @@ void hvm_cpuid(unsigned int input, unsigned int *eax, unsigned int *ebx, *eax |= (p->extd.lm ? vaddr_bits : 32) << 8; - *ebx &= hvm_featureset[FEATURESET_e8b]; + *ebx = p->extd.e8b; break; case 0x8000001c: