diff mbox

x86/cpuid: Add AVX512_VPOPCNTDQ support

Message ID 1484030072-9418-1-git-send-email-he.chen@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

He Chen Jan. 10, 2017, 6:34 a.m. UTC
AVX512_VPOPCNTDQ: Vector POPCNT instructions for word and qwords.
variable precision.

Signed-off-by: He Chen <he.chen@linux.intel.com>
---
 xen/include/public/arch-x86/cpufeatureset.h | 1 +
 xen/tools/gen-cpuid.py                      | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

Comments

Jan Beulich Jan. 10, 2017, 8:49 a.m. UTC | #1
>>> On 10.01.17 at 07:34, <he.chen@linux.intel.com> wrote:
> --- a/xen/include/public/arch-x86/cpufeatureset.h
> +++ b/xen/include/public/arch-x86/cpufeatureset.h
> @@ -226,6 +226,7 @@ XEN_CPUFEATURE(PREFETCHWT1,   6*32+ 0) /*A  PREFETCHWT1 instruction */
>  XEN_CPUFEATURE(AVX512VBMI,    6*32+ 1) /*A  AVX-512 Vector Byte Manipulation Instrs */
>  XEN_CPUFEATURE(PKU,           6*32+ 3) /*H  Protection Keys for Userspace */
>  XEN_CPUFEATURE(OSPKE,         6*32+ 4) /*!  OS Protection Keys Enable */
> +XEN_CPUFEATURE(VPOPCNTDQ,     6*32+14) /*A  POPCNT for vectors of DW/QW */

Hmm, the document has an AVX512_ prefix here, and while that's a
little lengthy I think we should try to stick to SDM names.

Jan
He Chen Jan. 10, 2017, 8:59 a.m. UTC | #2
On Tue, Jan 10, 2017 at 01:49:06AM -0700, Jan Beulich wrote:
> >>> On 10.01.17 at 07:34, <he.chen@linux.intel.com> wrote:
> > --- a/xen/include/public/arch-x86/cpufeatureset.h
> > +++ b/xen/include/public/arch-x86/cpufeatureset.h
> > @@ -226,6 +226,7 @@ XEN_CPUFEATURE(PREFETCHWT1,   6*32+ 0) /*A  PREFETCHWT1 instruction */
> >  XEN_CPUFEATURE(AVX512VBMI,    6*32+ 1) /*A  AVX-512 Vector Byte Manipulation Instrs */
> >  XEN_CPUFEATURE(PKU,           6*32+ 3) /*H  Protection Keys for Userspace */
> >  XEN_CPUFEATURE(OSPKE,         6*32+ 4) /*!  OS Protection Keys Enable */
> > +XEN_CPUFEATURE(VPOPCNTDQ,     6*32+14) /*A  POPCNT for vectors of DW/QW */
> 
> Hmm, the document has an AVX512_ prefix here, and while that's a
> little lengthy I think we should try to stick to SDM names.
> 
Sure.
diff mbox

Patch

diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h
index 565ccd5..285224d 100644
--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -226,6 +226,7 @@  XEN_CPUFEATURE(PREFETCHWT1,   6*32+ 0) /*A  PREFETCHWT1 instruction */
 XEN_CPUFEATURE(AVX512VBMI,    6*32+ 1) /*A  AVX-512 Vector Byte Manipulation Instrs */
 XEN_CPUFEATURE(PKU,           6*32+ 3) /*H  Protection Keys for Userspace */
 XEN_CPUFEATURE(OSPKE,         6*32+ 4) /*!  OS Protection Keys Enable */
+XEN_CPUFEATURE(VPOPCNTDQ,     6*32+14) /*A  POPCNT for vectors of DW/QW */
 
 /* AMD-defined CPU features, CPUID level 0x80000007.edx, word 7 */
 XEN_CPUFEATURE(ITSC,          7*32+ 8) /*   Invariant TSC */
diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py
index 420a5cc..1067c85 100755
--- a/xen/tools/gen-cpuid.py
+++ b/xen/tools/gen-cpuid.py
@@ -255,7 +255,8 @@  def crunch_numbers(state):
         # 512bit registers, and the instructions themselves. All further AVX512 features
         # are built on top of AVX512F
         AVX512F: [AVX512DQ, AVX512IFMA, AVX512PF, AVX512ER, AVX512CD,
-                  AVX512BW, AVX512VL, AVX512VBMI, AVX512_4VNNIW, AVX512_4FMAPS],
+                  AVX512BW, AVX512VL, AVX512VBMI, AVX512_4VNNIW,
+                  AVX512_4FMAPS, VPOPCNTDQ],
     }
 
     deep_features = tuple(sorted(deps.keys()))