From patchwork Mon Feb 27 14:03:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Cooper X-Patchwork-Id: 9593203 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3B8C460453 for ; Mon, 27 Feb 2017 14:07:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2C2122818B for ; Mon, 27 Feb 2017 14:07:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1DFAF28338; Mon, 27 Feb 2017 14:07:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8979C2818B for ; Mon, 27 Feb 2017 14:07:35 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ciLva-0005dT-3o; Mon, 27 Feb 2017 14:05:26 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ciLvY-0005cF-5w for xen-devel@lists.xen.org; Mon, 27 Feb 2017 14:05:24 +0000 Received: from [85.158.139.211] by server-17.bemta-5.messagelabs.com id 95/91-28097-32234B85; Mon, 27 Feb 2017 14:05:23 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprIIsWRWlGSWpSXmKPExsXitHRDpK6S0ZY Ig9udWhZLPi5mcWD0OLr7N1MAYxRrZl5SfkUCa8b5HXfYCi7KV/ybeZi9gfGcZBcjJ4eEgL/E z8PdLCA2m4C+xO4Xn5hAbBEBdYnTHRdZQWxmgf2MEn+bbEBsYQFfic4L/9hBbBYBVYmpP2aC1 fAKeEqseX2MEWKmnMT54z+ZQWxOAS+JHzcWgsWFgGqWtbUyQ9hqEtf6L7FD9ApKnJz5hAVil4 TEwRcvmCcw8s5CkpqFJLWAkWkVo0ZxalFZapGuobleUlFmekZJbmJmjq6hgalebmpxcWJ6ak5 iUrFecn7uJkZg8DAAwQ7Gi6c9DzFKcjApifK6fd4cIcSXlJ9SmZFYnBFfVJqTWnyIUYaDQ0mC l91wS4SQYFFqempFWmYOMIxh0hIcPEoivNkGQGne4oLE3OLMdIjUKUZdjjmzd79hEmLJy89Ll RLnnQxSJABSlFGaBzcCFlOXGGWlhHkZgY4S4ilILcrNLEGVf8UozsGoJMybD3IJT2ZeCdymV0 BHMAEdMdt4I8gRJYkIKakGRtdXi99xiovfOKUvUiUvMc/XRiHsSNGRchdlHp6qKVaLwqd8flS 55tH+ZVs2lwn1Fj5bLKj8od53xwajgBeMIpHHw1Q27T9x77LjZvVjV6dGnLJ3ZXxm4fSEY86f n92fG6Jubk1xC1Jb+3DPhYafp/9+jwzt97kcpDxvk0TELwaDY4UnZjE/jVNiKc5INNRiLipOB ACz+n76pAIAAA== X-Env-Sender: prvs=224fcc783=Andrew.Cooper3@citrix.com X-Msg-Ref: server-13.tower-206.messagelabs.com!1488204320!71394432!1 X-Originating-IP: [66.165.176.89] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni44OSA9PiAyMDMwMDc=\n, received_headers: No Received headers X-StarScan-Received: X-StarScan-Version: 9.2.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 12282 invoked from network); 27 Feb 2017 14:05:22 -0000 Received: from smtp.citrix.com (HELO SMTP.CITRIX.COM) (66.165.176.89) by server-13.tower-206.messagelabs.com with RC4-SHA encrypted SMTP; 27 Feb 2017 14:05:22 -0000 X-IronPort-AV: E=Sophos;i="5.35,214,1484006400"; d="scan'208";a="409984231" From: Andrew Cooper To: Xen-devel Date: Mon, 27 Feb 2017 14:03:12 +0000 Message-ID: <1488204198-23948-2-git-send-email-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1488204198-23948-1-git-send-email-andrew.cooper3@citrix.com> References: <1488204198-23948-1-git-send-email-andrew.cooper3@citrix.com> MIME-Version: 1.0 Cc: George Dunlap , Andrew Cooper , Paul Durrant , Tim Deegan , Jan Beulich Subject: [Xen-devel] [PATCH 1/7] x86/hvm: Correctly identify implicit supervisor accesses X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP All actions which refer to the active ldt/gdt/idt or task register (e.g. loading a new segment selector) are known as implicit supervisor accesses, even when the access originates from user code. The distinction is necessary in the pagewalk when SMAP is enabled. Refer to Intel SDM Vol 3 "Access Rights" for the exact details. Introduce a new pagewalk input, and make use of the new system segment references in hvmemul_{read,write}(). While modifying those areas, move the calculation of the appropriate pagewalk input before its first use. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Tim Deegan Acked-by: George Dunlap Reviewed-by: Paul Durrant --- CC: Jan Beulich CC: Paul Durrant CC: George Dunlap CC: Tim Deegan --- xen/arch/x86/hvm/emulate.c | 18 ++++++++++-------- xen/arch/x86/mm/guest_walk.c | 4 ++++ xen/include/asm-x86/processor.h | 1 + 3 files changed, 15 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index f24d289..9b32bca 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -783,6 +783,11 @@ static int __hvmemul_read( struct hvm_vcpu_io *vio = &curr->arch.hvm_vcpu.hvm_io; int rc; + if ( is_x86_system_segment(seg) ) + pfec |= PFEC_implicit; + else if ( hvmemul_ctxt->seg_reg[x86_seg_ss].attr.fields.dpl == 3 ) + pfec |= PFEC_user_mode; + rc = hvmemul_virtual_to_linear( seg, offset, bytes, &reps, access_type, hvmemul_ctxt, &addr); if ( rc != X86EMUL_OKAY || !bytes ) @@ -793,10 +798,6 @@ static int __hvmemul_read( (vio->mmio_gla == (addr & PAGE_MASK)) ) return hvmemul_linear_mmio_read(addr, bytes, p_data, pfec, hvmemul_ctxt, 1); - if ( (seg != x86_seg_none) && - (hvmemul_ctxt->seg_reg[x86_seg_ss].attr.fields.dpl == 3) ) - pfec |= PFEC_user_mode; - rc = ((access_type == hvm_access_insn_fetch) ? hvm_fetch_from_guest_linear(p_data, addr, bytes, pfec, &pfinfo) : hvm_copy_from_guest_linear(p_data, addr, bytes, pfec, &pfinfo)); @@ -893,6 +894,11 @@ static int hvmemul_write( struct hvm_vcpu_io *vio = &curr->arch.hvm_vcpu.hvm_io; int rc; + if ( is_x86_system_segment(seg) ) + pfec |= PFEC_implicit; + else if ( hvmemul_ctxt->seg_reg[x86_seg_ss].attr.fields.dpl == 3 ) + pfec |= PFEC_user_mode; + rc = hvmemul_virtual_to_linear( seg, offset, bytes, &reps, hvm_access_write, hvmemul_ctxt, &addr); if ( rc != X86EMUL_OKAY || !bytes ) @@ -902,10 +908,6 @@ static int hvmemul_write( (vio->mmio_gla == (addr & PAGE_MASK)) ) return hvmemul_linear_mmio_write(addr, bytes, p_data, pfec, hvmemul_ctxt, 1); - if ( (seg != x86_seg_none) && - (hvmemul_ctxt->seg_reg[x86_seg_ss].attr.fields.dpl == 3) ) - pfec |= PFEC_user_mode; - rc = hvm_copy_to_guest_linear(addr, p_data, bytes, pfec, &pfinfo); switch ( rc ) diff --git a/xen/arch/x86/mm/guest_walk.c b/xen/arch/x86/mm/guest_walk.c index faaf70c..4f8d0e3 100644 --- a/xen/arch/x86/mm/guest_walk.c +++ b/xen/arch/x86/mm/guest_walk.c @@ -161,6 +161,10 @@ guest_walk_tables(struct vcpu *v, struct p2m_domain *p2m, bool_t pse1G = 0, pse2M = 0; p2m_query_t qt = P2M_ALLOC | P2M_UNSHARE; + /* Only implicit supervisor data accesses exist. */ + ASSERT(!(pfec & PFEC_implicit) || + !(pfec & (PFEC_insn_fetch|PFEC_user_mode))); + perfc_incr(guest_walk); memset(gw, 0, sizeof(*gw)); gw->va = va; diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h index dda8b83..d3ba8ea 100644 --- a/xen/include/asm-x86/processor.h +++ b/xen/include/asm-x86/processor.h @@ -76,6 +76,7 @@ /* Internally used only flags. */ #define PFEC_page_paged (1U<<16) #define PFEC_page_shared (1U<<17) +#define PFEC_implicit (1U<<18) /* Pagewalk input for ldt/gdt/idt/tr accesses. */ /* Other exception error code values. */ #define X86_XEC_EXT (_AC(1,U) << 0)