From patchwork Wed Mar 15 05:11:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chao Gao X-Patchwork-Id: 9625479 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5267C60424 for ; Wed, 15 Mar 2017 12:16:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 492C42860B for ; Wed, 15 Mar 2017 12:16:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3E1AD28616; Wed, 15 Mar 2017 12:16:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.5 required=2.0 tests=BAYES_00, DATE_IN_PAST_06_12, DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E33632860B for ; Wed, 15 Mar 2017 12:16:28 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1co7oa-0004C4-FG; Wed, 15 Mar 2017 12:14:04 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1co7oZ-0004Bk-Lu for xen-devel@lists.xen.org; Wed, 15 Mar 2017 12:14:03 +0000 Received: from [85.158.139.211] by server-4.bemta-5.messagelabs.com id 53/7A-13971-B0039C85; Wed, 15 Mar 2017 12:14:03 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrFLMWRWlGSWpSXmKPExsXS1tbhqMtpcDL CYOZbZYslHxezODB6HN39mymAMYo1My8pvyKBNWPrlInsBWtFK5Y+6GZqYDwo0MXIxcEicItJ oufGRlYQR0hgGqPEg1+XgBxODgkBXokjy2ZA2QESE99/YAKxhQTKJab+eMMCYrMJKEtc/NrLB mKLCEhLXPt8mRFkELPAcSaJa1fnMYIkhAW8JBbvvMgOYrMIqErcuDEZrIFXwFHiwtk1bBALFC SmPHzP3MXIwcEp4CSx4W0dxC5HiV17Z7BOYORbwMiwilG9OLWoLLVI11AvqSgzPaMkNzEzR9f QwFQvN7W4ODE9NScxqVgvOT93EyMwTOoZGBh3MDb1Oh9ilORgUhLlVRE8ESHEl5SfUpmRWJwR X1Sak1p8iFGGg0NJgvfpIaCcYFFqempFWmYOMGBh0hIcPEoivEUgad7igsTc4sx0iNQpRkUpc d4skIQASCKjNA+uDRYllxhlpYR5GRkYGIR4ClKLcjNLUOVfMYpzMCoJ81aDTOHJzCuBm/4KaD ET0OLEn0dAFpckIqSkGhgV/IJvcZ9Yu3JbjteODB6nli6pMm7NycsVDnYnPxeUKN6w/EDY1bt SDNeuXF387v+8LQw/ahmOv795uDpUUtDraorRv2nL/t28erxTjP/3XoslArJtuydtrCy5P6Pj f/LG4xnftpy6vbxsK8uFH0+TuraL8Fha5Km6ra5bse9XV178G/udfBL7lFiKMxINtZiLihMBN NONtY0CAAA= X-Env-Sender: chao.gao@intel.com X-Msg-Ref: server-13.tower-206.messagelabs.com!1489580028!74059212!5 X-Originating-IP: [134.134.136.65] X-SpamReason: No, hits=0.8 required=7.0 tests=DATE_IN_PAST_06_12 X-StarScan-Received: X-StarScan-Version: 9.2.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 15280 invoked from network); 15 Mar 2017 12:14:01 -0000 Received: from mga03.intel.com (HELO mga03.intel.com) (134.134.136.65) by server-13.tower-206.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 15 Mar 2017 12:14:01 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1489580041; x=1521116041; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=EzwujcWs1GsJSOrnh+jrlMljQ9gY6k5qgrVv+9NXTuk=; b=QEbfX5vbaTv1lJxg7+4xTcWoz+2hdLtdlNsAK9fHhdRsDGjNduzG22+H GPQLD8eZTKrJEvpCIIe+IvBVv9mXJA==; Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 15 Mar 2017 05:14:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.36,168,1486454400"; d="scan'208"; a="1108706797" Received: from skl-2s3.sh.intel.com ([10.239.48.35]) by orsmga001.jf.intel.com with ESMTP; 15 Mar 2017 05:13:58 -0700 From: Chao Gao To: xen-devel@lists.xen.org Date: Wed, 15 Mar 2017 13:11:20 +0800 Message-Id: <1489554682-6126-5-git-send-email-chao.gao@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1489554682-6126-1-git-send-email-chao.gao@intel.com> References: <1489554682-6126-1-git-send-email-chao.gao@intel.com> Cc: Kevin Tian , Jun Nakajima , George Dunlap , Andrew Cooper , Dario Faggioli , Jan Beulich , Chao Gao Subject: [Xen-devel] [PATCH v10 4/6] VT-d: introduce update_irte to update irte safely X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP We used structure assignment to update irte which was not safe when an interrupt happened during update. It is better to update IRTE atomically through cmpxchg16b(). When cmpxchg16b is not supported, two 64-bit write operations can update IRTE safely when only the high qword or the low qword is intented to be updated. Signed-off-by: Chao Gao --- v10: - rename copy_irte_to_irt to update_irte - remove copy_from_to_irt - change commmit message and add some comments to illustrate on which condition update_irte() is safe. xen/drivers/passthrough/vtd/intremap.c | 36 ++++++++++++++++++++++++++++++++-- 1 file changed, 34 insertions(+), 2 deletions(-) diff --git a/xen/drivers/passthrough/vtd/intremap.c b/xen/drivers/passthrough/vtd/intremap.c index 7d4c7e1..342b45f 100644 --- a/xen/drivers/passthrough/vtd/intremap.c +++ b/xen/drivers/passthrough/vtd/intremap.c @@ -169,6 +169,38 @@ bool_t __init iommu_supports_eim(void) return 1; } +static void update_irte(struct iremap_entry *entry, + const struct iremap_entry *new_ire) +{ + if ( cpu_has_cx16 ) + { + __uint128_t ret; + struct iremap_entry old_ire; + + old_ire = *entry; + ret = cmpxchg16b(entry, &old_ire, new_ire); + + /* + * In the above, we use cmpxchg16 to atomically update the 128-bit + * IRTE, and the hardware cannot update the IRTE behind us, so + * the return value of cmpxchg16 should be the same as old_ire. + * This ASSERT validate it. + */ + ASSERT(ret == old_ire.val); + } + else + { + /* + * The following method to update IRTE is safe on condition that + * only the high qword or the low qword is to be updated. + * If entire IRTE is to be updated, callers should make sure the + * IRTE is not in use. + */ + entry->lo = new_ire->lo; + entry->hi = new_ire->hi; + } +} + /* Mark specified intr remap entry as free */ static void free_remap_entry(struct iommu *iommu, int index) { @@ -353,7 +385,7 @@ static int ioapic_rte_to_remap_entry(struct iommu *iommu, remap_rte->format = 1; /* indicate remap format */ } - *iremap_entry = new_ire; + update_irte(iremap_entry, &new_ire); iommu_flush_cache_entry(iremap_entry, sizeof(*iremap_entry)); iommu_flush_iec_index(iommu, 0, index); @@ -640,7 +672,7 @@ static int msi_msg_to_remap_entry( remap_rte->address_hi = 0; remap_rte->data = index - i; - *iremap_entry = new_ire; + update_irte(iremap_entry, &new_ire); iommu_flush_cache_entry(iremap_entry, sizeof(*iremap_entry)); iommu_flush_iec_index(iommu, 0, index);