From patchwork Fri Mar 17 11:27:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "lan,Tianyu" X-Patchwork-Id: 9630433 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0BF5D60249 for ; Fri, 17 Mar 2017 11:37:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E9CC5284E9 for ; Fri, 17 Mar 2017 11:37:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DEB642862B; Fri, 17 Mar 2017 11:37:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3116D284E9 for ; Fri, 17 Mar 2017 11:37:34 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1coqAT-000452-Tp; Fri, 17 Mar 2017 11:35:37 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1coqAS-00042j-Nq for xen-devel@lists.xen.org; Fri, 17 Mar 2017 11:35:36 +0000 Received: from [85.158.137.68] by server-16.bemta-3.messagelabs.com id 4C/E5-06437-80ACBC85; Fri, 17 Mar 2017 11:35:36 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrFLMWRWlGSWpSXmKPExsXS1tYhost+6nS EwbbfWhZLPi5mcWD0OLr7N1MAYxRrZl5SfkUCa0bP7gtsBQ9UKz4+uMDcwHhAtouRi4NF4BaT RP/vqyxdjJwcQgLTGSW+ry0CsSUEeCWOLJvBCmEHSBz418QE0iAk0M8o8WHmNrAEm4C6xInFE xlBbBEBaYlrny8zghQxCzQySjTsbWQDSQgLhEvMnbQBbAOLgKrE3LV7mUBsXgFXibN/HgAN4g DaoCAxZ5INSJgTKHy37QE7xEEuEve6rrBMYORbwMiwilG9OLWoLLVI11AvqSgzPaMkNzEzR9f QwFgvN7W4ODE9NScxqVgvOT93EyMwTBiAYAfj8o9OhxglOZiURHlPOp2MEOJLyk+pzEgszogv Ks1JLT7EKMPBoSTByxMIlBMsSk1PrUjLzAEGLExagoNHSYT3QwBQmre4IDG3ODMdInWKUVFKn Pc9SJ8ASCKjNA+uDRYllxhlpYR5GYEOEeIpSC3KzSxBlX/FKM7BqCTM+wdkPE9mXgnc9FdAi5 mAFr/9cAJkcUkiQkqqgXFq1+G27I4z5Rs7rmz7pFq1TlVf5cL7bxJLr7xmX3x7Vew/xuS+270 hjO686dPmxFqbnPrUlBX6tjVoU18M9/X9fauPuCS98rSXWPF+XtLvJzpbJ3QmnJverhFg+fJF qkeYjHCW3Twv1S2ed59r7inZYGQ4RWKO21616X/zQpo/zjM7PFH6doASS3FGoqEWc1FxIgA8+ vL+jQIAAA== X-Env-Sender: tianyu.lan@intel.com X-Msg-Ref: server-7.tower-31.messagelabs.com!1489750532!83225957!2 X-Originating-IP: [134.134.136.20] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTM0LjEzNC4xMzYuMjAgPT4gMzU1MzU4\n X-StarScan-Received: X-StarScan-Version: 9.2.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 23869 invoked from network); 17 Mar 2017 11:35:35 -0000 Received: from mga02.intel.com (HELO mga02.intel.com) (134.134.136.20) by server-7.tower-31.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 17 Mar 2017 11:35:35 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1489750535; x=1521286535; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=jsyMJ1Q7Zjx9xeTPp7qkfUHPtoAJfaukyx8njlZOL+w=; b=Me5Yc4JUWCZKnpHV1uMx8mF5aJDqAYkwtWnEKb/MXkEWEiH3DdB42L46 oMcPAb34WNGLlvWreu+j0S3sW2pqHg==; Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Mar 2017 04:35:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.36,176,1486454400"; d="scan'208"; a="1123972608" Received: from lantianyu-ws.sh.intel.com (HELO localhost) ([10.239.159.159]) by fmsmga001.fm.intel.com with ESMTP; 17 Mar 2017 04:35:26 -0700 From: Lan Tianyu To: xen-devel@lists.xen.org Date: Fri, 17 Mar 2017 19:27:12 +0800 Message-Id: <1489750043-17260-13-git-send-email-tianyu.lan@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1489750043-17260-1-git-send-email-tianyu.lan@intel.com> References: <1489750043-17260-1-git-send-email-tianyu.lan@intel.com> Cc: Lan Tianyu , andrew.cooper3@citrix.com, kevin.tian@intel.com, jbeulich@suse.com, chao.gao@intel.com Subject: [Xen-devel] [RFC PATCH 12/23] X86/vvtd: Set Interrupt Remapping Table Pointer through GCMD X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Chao Gao Software sets this field to set/update the interrupt remapping table pointer used by hardware. The interrupt remapping table pointer is specified through the Interrupt Remapping Table Address (IRTA_REG) register. This patch emulates this operation and uses some fields of VVTD to track info about interrupt remapping table. Signed-off-by: Chao Gao Signed-off-by: Lan Tianyu --- xen/arch/x86/hvm/vvtd.c | 70 +++++++++++++++++++++++++++++++++++++ xen/drivers/passthrough/vtd/iommu.h | 9 ++++- 2 files changed, 78 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/vvtd.c b/xen/arch/x86/hvm/vvtd.c index 9473fe0..a12b4d1 100644 --- a/xen/arch/x86/hvm/vvtd.c +++ b/xen/arch/x86/hvm/vvtd.c @@ -45,6 +45,13 @@ struct vvtd { uint64_t base_addr; /* Point back to the owner domain */ struct domain *domain; + /* Is in Extended Interrupt Mode */ + bool eim; + /* Interrupt remapping table base gfn */ + uint64_t irt; + /* Max remapping entries in IRT */ + int irt_max_entry; + struct hvm_hw_vvtd_regs *regs; struct page_info *regs_page; }; @@ -81,6 +88,11 @@ static inline struct vvtd *vcpu_vvtd(struct vcpu *v) return domain_vvtd(v->domain); } +static inline void __vvtd_set_bit(struct vvtd *vvtd, uint32_t reg, int nr) +{ + return __set_bit(nr, (uint32_t *)&vvtd->regs->data[reg]); +} + static inline void vvtd_set_reg(struct vvtd *vtd, uint32_t reg, uint32_t value) { @@ -107,6 +119,41 @@ static inline uint8_t vvtd_get_reg_byte(struct vvtd *vtd, uint32_t reg) vvtd_set_reg(vvtd, (reg) + 4, (uint32_t)((val) >> 32)); \ } while(0) +static int vvtd_handle_gcmd_sirtp(struct vvtd *vvtd, unsigned long val) +{ + uint64_t irta; + + if ( !(val & DMA_GCMD_SIRTP) ) + return X86EMUL_OKAY; + + vvtd_get_reg_quad(vvtd, DMAR_IRTA_REG, irta); + vvtd->irt = DMA_IRTA_ADDR(irta) >> PAGE_SHIFT; + vvtd->irt_max_entry = DMA_IRTA_SIZE(irta); + vvtd->eim = !!(irta & IRTA_EIME); + VVTD_DEBUG(VVTD_DBG_RW, "Update IR info (addr=%lx eim=%d size=%d).", + vvtd->irt, vvtd->eim, vvtd->irt_max_entry); + __vvtd_set_bit(vvtd, DMAR_GSTS_REG, DMA_GSTS_SIRTPS_BIT); + + return X86EMUL_OKAY; +} + +static int vvtd_write_gcmd(struct vvtd *vvtd, unsigned long val) +{ + uint32_t orig = vvtd_get_reg(vvtd, DMAR_GSTS_REG); + uint32_t changed = orig ^ val; + + if ( !changed ) + return X86EMUL_OKAY; + if ( (changed & (changed - 1)) ) + VVTD_DEBUG(VVTD_DBG_RW, "Guest attempts to update multiple fields " + "of GCMD_REG in one write transation."); + + if ( changed & DMA_GCMD_SIRTP ) + vvtd_handle_gcmd_sirtp(vvtd, val); + + return X86EMUL_OKAY; +} + static int vvtd_range(struct vcpu *v, unsigned long addr) { struct vvtd *vvtd = vcpu_vvtd(v); @@ -183,6 +230,26 @@ static int vvtd_write(struct vcpu *v, unsigned long addr, ret = X86EMUL_UNHANDLEABLE; switch ( offset_aligned ) { + case DMAR_GCMD_REG: + if ( len == 8 ) + goto error; + ret = vvtd_write_gcmd(vvtd, val_lo); + break; + + case DMAR_IRTA_REG: + if ( len == 8 ) + vvtd_set_reg_quad(vvtd, DMAR_IRTA_REG, val); + else + vvtd_set_reg(vvtd, DMAR_IRTA_REG, val_lo); + break; + + case DMAR_IRTA_REG_HI: + if ( len == 8 ) + goto error; + vvtd_set_reg(vvtd, DMAR_IRTA_REG_HI, val_lo); + ret = X86EMUL_OKAY; + break; + case DMAR_IEDATA_REG: case DMAR_IEADDR_REG: case DMAR_IEUADDR_REG: @@ -266,6 +333,9 @@ static struct vvtd *__vvtd_create(struct domain *d, vvtd->base_addr = base_addr; vvtd->domain = d; vvtd->status = 0; + vvtd->eim = 0; + vvtd->irt = 0; + vvtd->irt_max_entry = 0; register_mmio_handler(d, &vvtd_mmio_ops); return vvtd; diff --git a/xen/drivers/passthrough/vtd/iommu.h b/xen/drivers/passthrough/vtd/iommu.h index 2e9dcaa..fd040d0 100644 --- a/xen/drivers/passthrough/vtd/iommu.h +++ b/xen/drivers/passthrough/vtd/iommu.h @@ -195,9 +195,16 @@ #define DMA_GSTS_WBFS (((u64)1) << 27) #define DMA_GSTS_QIES (((u64)1) <<26) #define DMA_GSTS_IRES (((u64)1) <<25) -#define DMA_GSTS_SIRTPS (((u64)1) << 24) +#define DMA_GSTS_SIRTPS_BIT 24 +#define DMA_GSTS_SIRTPS (((u64)1) << DMA_GSTS_SIRTPS_BIT) #define DMA_GSTS_CFIS (((u64)1) <<23) +/* IRTA_REG */ +#define DMA_IRTA_ADDR(val) (val & ~0xfffULL) +#define DMA_IRTA_EIME(val) (!!(val & (1 << 11))) +#define DMA_IRTA_S(val) (val & 0xf) +#define DMA_IRTA_SIZE(val) (1UL << (DMA_IRTA_S(val) + 1)) + /* PMEN_REG */ #define DMA_PMEN_EPM (((u32)1) << 31) #define DMA_PMEN_PRS (((u32)1) << 0)