From patchwork Mon Mar 20 17:08:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Durrant X-Patchwork-Id: 9634611 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id ACBC960132 for ; Mon, 20 Mar 2017 17:11:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9612720453 for ; Mon, 20 Mar 2017 17:11:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8824627D4D; Mon, 20 Mar 2017 17:11:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E93B420453 for ; Mon, 20 Mar 2017 17:11:29 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cq0na-00075y-Ea; Mon, 20 Mar 2017 17:08:50 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cq0nZ-00074V-0O for xen-devel@lists.xenproject.org; Mon, 20 Mar 2017 17:08:49 +0000 Received: from [85.158.137.68] by server-8.bemta-3.messagelabs.com id DF/0D-00609-0AC00D85; Mon, 20 Mar 2017 17:08:48 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpmkeJIrShJLcpLzFFi42JxWrohUncBz4U Ig2P7RC2+b5nM5MDocfjDFZYAxijWzLyk/IoE1owXT5qZC57bVcxcp9rA+Newi5GTQ0LAX+Lx 6gtsIDabgI7E1KeXWLsYOThEBFQkbu81AAkzCxxglHh9mwPEFhawk1gzoZEJxGYRUJW4u3UtK 4jNK+AmsXzhJGaIkXIS54//BLM5Bdwl9j27zQJiCwHVPFyyhxHCVpFYP3UWG0SvoMTJmU9YIH ZJSBx88YJ5AiPvLCSpWUhSCxiZVjFqFKcWlaUW6RqZ6yUVZaZnlOQmZuboGhoY6+WmFhcnpqf mJCYV6yXn525iBAZOPQMD4w7Glr1+hxglOZiURHlVBE9ECPEl5adUZiQWZ8QXleakFh9ilOHg UJLgnbIQKCdYlJqeWpGWmQMMYZi0BAePkgjvVJA0b3FBYm5xZjpE6hSjopQ47yOQhABIIqM0D 64NFjeXGGWlhHkZGRgYhHgKUotyM0tQ5V8xinMwKgnzai8CmsKTmVcCN/0V0GImoMWJP4+ALC 5JREhJNTAyRmxbEB3D4j5zuZlK54n2W8U5C/ny594WOMltUN3GunvVzSW/Oh9LvXXJ7RGt/rB S68Hm4jAdLqe6hx8ZrZ9Ebc/xkQsWKJD6aHtQP1bOar15Q+bd6qnNqzMZFh+c93PnDeHmPzET +9NLfqmLSTsvmXxJXdmPJ2nKy5CCOoZmEWGVa5oV5UosxRmJhlrMRcWJAO7RH0mWAgAA X-Env-Sender: prvs=245da84ed=Paul.Durrant@citrix.com X-Msg-Ref: server-4.tower-31.messagelabs.com!1490029723!33058188!4 X-Originating-IP: [66.165.176.89] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni44OSA9PiAyMDMwMDc=\n, received_headers: No Received headers X-StarScan-Received: X-StarScan-Version: 9.2.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 63784 invoked from network); 20 Mar 2017 17:08:48 -0000 Received: from smtp.citrix.com (HELO SMTP.CITRIX.COM) (66.165.176.89) by server-4.tower-31.messagelabs.com with RC4-SHA encrypted SMTP; 20 Mar 2017 17:08:48 -0000 X-IronPort-AV: E=Sophos;i="5.36,195,1486425600"; d="scan'208";a="415033670" From: Paul Durrant To: Date: Mon, 20 Mar 2017 17:08:21 +0000 Message-ID: <1490029701-4311-7-git-send-email-paul.durrant@citrix.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1490029701-4311-1-git-send-email-paul.durrant@citrix.com> References: <1490029701-4311-1-git-send-email-paul.durrant@citrix.com> MIME-Version: 1.0 Cc: Wei Liu , Paul Durrant , Ian Jackson , Jan Beulich , Andrew Cooper Subject: [Xen-devel] [PATCH v2 6/6] x86/viridian: implement the crash MSRs X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Section 2.4.4 of the Hypervisor Top Level Functional Specification states that enabling bit 10 in EDX of CPUID leaf 3 advertises to Windows a set of MSRs into which it can write crash information. This patch advertises that bit and implements the MSRs such that Xen can log the information if a Windows guest crashes. Signed-off-by: Paul Durrant Reviewed-by: Jan Beulich Acked-by: Wei Liu --- Cc: Ian Jackson Cc: Wei Liu Cc: Paul Durrant Cc: Jan Beulich Cc: Andrew Cooper v2: - Make MSRs per-vcpu rather than per-domain - Fix hypervisor stack leak - Replicate BUILD_BOG_ON() - Use gprintk() rather than printk() --- docs/man/xl.cfg.pod.5.in | 10 ++++-- tools/libxl/libxl.h | 6 ++++ tools/libxl/libxl_dom.c | 4 +++ tools/libxl/libxl_types.idl | 1 + xen/arch/x86/hvm/viridian.c | 69 ++++++++++++++++++++++++++++++++++++++ xen/include/asm-x86/hvm/viridian.h | 1 + xen/include/public/hvm/params.h | 7 +++- 7 files changed, 95 insertions(+), 3 deletions(-) diff --git a/docs/man/xl.cfg.pod.5.in b/docs/man/xl.cfg.pod.5.in index 52802d5..991960b 100644 --- a/docs/man/xl.cfg.pod.5.in +++ b/docs/man/xl.cfg.pod.5.in @@ -1601,11 +1601,17 @@ per-vcpu event channel upcall vectors. Note that this enlightenment will have no effect if the guest is using APICv posted interrupts. +=item B + +This group incorporates the crash control MSRs. These enlightenments +allow Windows to write crash information such that it can be logged +by Xen. + =item B This is a special value that enables the default set of groups, which -is currently the B, B, B and B -groups. +is currently the B, B, B, B +and B groups. =item B diff --git a/tools/libxl/libxl.h b/tools/libxl/libxl.h index 72ec39d..af45582 100644 --- a/tools/libxl/libxl.h +++ b/tools/libxl/libxl.h @@ -288,6 +288,12 @@ #define LIBXL_HAVE_SCHED_CREDIT2_PARAMS 1 /* + * LIBXL_HAVE_CRASH_CTL indicates that the 'crash_ctl' value + * is present in the viridian enlightenment enumeration. + */ +#define LIBXL_HAVE_CRASH_CTL 1 + +/* * libxl ABI compatibility * * The only guarantee which libxl makes regarding ABI compatibility diff --git a/tools/libxl/libxl_dom.c b/tools/libxl/libxl_dom.c index e133962..c25cf48 100644 --- a/tools/libxl/libxl_dom.c +++ b/tools/libxl/libxl_dom.c @@ -214,6 +214,7 @@ static int hvm_set_viridian_features(libxl__gc *gc, uint32_t domid, libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_FREQ); libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_TIME_REF_COUNT); libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_APIC_ASSIST); + libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_CRASH_CTL); } libxl_for_each_set_bit(v, info->u.hvm.viridian_enable) { @@ -259,6 +260,9 @@ static int hvm_set_viridian_features(libxl__gc *gc, uint32_t domid, if (libxl_bitmap_test(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_APIC_ASSIST)) mask |= HVMPV_apic_assist; + if (libxl_bitmap_test(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_CRASH_CTL)) + mask |= HVMPV_crash_ctl; + if (mask != 0 && xc_hvm_param_set(CTX->xch, domid, diff --git a/tools/libxl/libxl_types.idl b/tools/libxl/libxl_types.idl index 2475a4d..69e789a 100644 --- a/tools/libxl/libxl_types.idl +++ b/tools/libxl/libxl_types.idl @@ -224,6 +224,7 @@ libxl_viridian_enlightenment = Enumeration("viridian_enlightenment", [ (3, "reference_tsc"), (4, "hcall_remote_tlb_flush"), (5, "apic_assist"), + (6, "crash_ctl"), ]) libxl_hdtype = Enumeration("hdtype", [ diff --git a/xen/arch/x86/hvm/viridian.c b/xen/arch/x86/hvm/viridian.c index 5ca1167..c914ee8 100644 --- a/xen/arch/x86/hvm/viridian.c +++ b/xen/arch/x86/hvm/viridian.c @@ -154,6 +154,19 @@ typedef struct { uint64_t Reserved8:10; } HV_PARTITION_PRIVILEGE_MASK; +typedef union _HV_CRASH_CTL_REG_CONTENTS +{ + uint64_t AsUINT64; + struct + { + uint64_t Reserved:63; + uint64_t CrashNotify:1; + }; +} HV_CRASH_CTL_REG_CONTENTS; + +/* Viridian CPUID leaf 3, Hypervisor Feature Indication */ +#define CPUID3D_CRASH_MSRS (1 << 10) + /* Viridian CPUID leaf 4: Implementation Recommendations. */ #define CPUID4A_HCALL_REMOTE_TLB_FLUSH (1 << 2) #define CPUID4A_MSR_BASED_APIC (1 << 3) @@ -248,6 +261,10 @@ void cpuid_viridian_leaves(const struct vcpu *v, uint32_t leaf, res->a = u.lo; res->b = u.hi; + + if ( viridian_feature_mask(d) & HVMPV_crash_ctl ) + res->d = CPUID3D_CRASH_MSRS; + break; } @@ -619,6 +636,36 @@ int wrmsr_viridian_regs(uint32_t idx, uint64_t val) update_reference_tsc(d, 1); break; + case HV_X64_MSR_CRASH_P0: + case HV_X64_MSR_CRASH_P1: + case HV_X64_MSR_CRASH_P2: + case HV_X64_MSR_CRASH_P3: + case HV_X64_MSR_CRASH_P4: + BUILD_BUG_ON(HV_X64_MSR_CRASH_P4 - HV_X64_MSR_CRASH_P0 >= + ARRAY_SIZE(v->arch.hvm_vcpu.viridian.crash_param)); + + idx -= HV_X64_MSR_CRASH_P0; + v->arch.hvm_vcpu.viridian.crash_param[idx] = val; + break; + + case HV_X64_MSR_CRASH_CTL: + { + HV_CRASH_CTL_REG_CONTENTS ctl; + + ctl.AsUINT64 = val; + + if ( !ctl.CrashNotify ) + break; + + gprintk(XENLOG_INFO, "VIRIDIAN CRASH: %lx %lx %lx %lx %lx\n", + v->arch.hvm_vcpu.viridian.crash_param[0], + v->arch.hvm_vcpu.viridian.crash_param[1], + v->arch.hvm_vcpu.viridian.crash_param[2], + v->arch.hvm_vcpu.viridian.crash_param[3], + v->arch.hvm_vcpu.viridian.crash_param[4]); + break; + } + default: if ( idx >= VIRIDIAN_MSR_MIN && idx <= VIRIDIAN_MSR_MAX ) gprintk(XENLOG_WARNING, "write to unimplemented MSR %08x\n", @@ -746,6 +793,28 @@ int rdmsr_viridian_regs(uint32_t idx, uint64_t *val) break; } + case HV_X64_MSR_CRASH_P0: + case HV_X64_MSR_CRASH_P1: + case HV_X64_MSR_CRASH_P2: + case HV_X64_MSR_CRASH_P3: + case HV_X64_MSR_CRASH_P4: + BUILD_BUG_ON(HV_X64_MSR_CRASH_P4 - HV_X64_MSR_CRASH_P0 >= + ARRAY_SIZE(v->arch.hvm_vcpu.viridian.crash_param)); + + idx -= HV_X64_MSR_CRASH_P0; + *val = v->arch.hvm_vcpu.viridian.crash_param[idx]; + break; + + case HV_X64_MSR_CRASH_CTL: + { + HV_CRASH_CTL_REG_CONTENTS ctl = { + .CrashNotify = 1, + }; + + *val = ctl.AsUINT64; + break; + } + default: if ( idx >= VIRIDIAN_MSR_MIN && idx <= VIRIDIAN_MSR_MAX ) gprintk(XENLOG_WARNING, "read from unimplemented MSR %08x\n", diff --git a/xen/include/asm-x86/hvm/viridian.h b/xen/include/asm-x86/hvm/viridian.h index 271c36d..30259e9 100644 --- a/xen/include/asm-x86/hvm/viridian.h +++ b/xen/include/asm-x86/hvm/viridian.h @@ -26,6 +26,7 @@ struct viridian_vcpu void *va; int vector; } vp_assist; + uint64_t crash_param[5]; }; union viridian_guest_os_id diff --git a/xen/include/public/hvm/params.h b/xen/include/public/hvm/params.h index 58c8478..19c9eb8 100644 --- a/xen/include/public/hvm/params.h +++ b/xen/include/public/hvm/params.h @@ -135,13 +135,18 @@ #define _HVMPV_apic_assist 5 #define HVMPV_apic_assist (1 << _HVMPV_apic_assist) +/* Enable crash MSRs */ +#define _HVMPV_crash_ctl 6 +#define HVMPV_crash_ctl (1 << _HVMPV_crash_ctl) + #define HVMPV_feature_mask \ (HVMPV_base_freq | \ HVMPV_no_freq | \ HVMPV_time_ref_count | \ HVMPV_reference_tsc | \ HVMPV_hcall_remote_tlb_flush | \ - HVMPV_apic_assist) + HVMPV_apic_assist | \ + HVMPV_crash_ctl) #endif