Message ID | 1490608598-11197-3-git-send-email-andrew.cooper3@citrix.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
>>> On 27.03.17 at 11:56, <andrew.cooper3@citrix.com> wrote: > Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com>
>>> On 27.03.17 at 11:56, <andrew.cooper3@citrix.com> wrote: > @@ -5183,6 +5184,8 @@ x86_emulate( > { > unsigned long zero = 0; > > + vcpu_must_have(clzero); Hmm, wait - doesn't this break the test harness? I.e. don't you need to also adjust emul_test_cpuid()? Jan
On 27/03/17 12:28, Jan Beulich wrote: >>>> On 27.03.17 at 11:56, <andrew.cooper3@citrix.com> wrote: >> @@ -5183,6 +5184,8 @@ x86_emulate( >> { >> unsigned long zero = 0; >> >> + vcpu_must_have(clzero); > Hmm, wait - doesn't this break the test harness? I.e. don't you need > to also adjust emul_test_cpuid()? The logical chain of events which lead to this discovery was an assertion failure in the stos() hook, and wondering how I hit it fuzzing on an Intel machine. The emul_test_cpuid() adjustment is later in the series with other related changes. ~Andrew
>>> On 27.03.17 at 14:13, <andrew.cooper3@citrix.com> wrote: > On 27/03/17 12:28, Jan Beulich wrote: >>>>> On 27.03.17 at 11:56, <andrew.cooper3@citrix.com> wrote: >>> @@ -5183,6 +5184,8 @@ x86_emulate( >>> { >>> unsigned long zero = 0; >>> >>> + vcpu_must_have(clzero); >> Hmm, wait - doesn't this break the test harness? I.e. don't you need >> to also adjust emul_test_cpuid()? > > The logical chain of events which lead to this discovery was an > assertion failure in the stos() hook, and wondering how I hit it fuzzing > on an Intel machine. > > The emul_test_cpuid() adjustment is later in the series with other > related changes. I don't think I've seen CLZERO there, but the (initial) adjustment would belong here anyway. Jan
On 27/03/17 13:31, Jan Beulich wrote: >>>> On 27.03.17 at 14:13, <andrew.cooper3@citrix.com> wrote: >> On 27/03/17 12:28, Jan Beulich wrote: >>>>>> On 27.03.17 at 11:56, <andrew.cooper3@citrix.com> wrote: >>>> @@ -5183,6 +5184,8 @@ x86_emulate( >>>> { >>>> unsigned long zero = 0; >>>> >>>> + vcpu_must_have(clzero); >>> Hmm, wait - doesn't this break the test harness? I.e. don't you need >>> to also adjust emul_test_cpuid()? >> The logical chain of events which lead to this discovery was an >> assertion failure in the stos() hook, and wondering how I hit it fuzzing >> on an Intel machine. >> >> The emul_test_cpuid() adjustment is later in the series with other >> related changes. > I don't think I've seen CLZERO there, but the (initial) adjustment > would belong here anyway. That is a very good point... I definitely remember putting it in, but I can't find it anywhere in my git tree. I must have lost it in a rebase somewhere. ~Andrew
diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 497cc77..7af8a42 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -1604,6 +1604,7 @@ static bool vcpu_has( #define vcpu_has_clwb() vcpu_has( 7, EBX, 24, ctxt, ops) #define vcpu_has_sha() vcpu_has( 7, EBX, 29, ctxt, ops) #define vcpu_has_rdpid() vcpu_has( 7, ECX, 22, ctxt, ops) +#define vcpu_has_clzero() vcpu_has(0x80000008, EBX, 0, ctxt, ops) #define vcpu_must_have(feat) \ generate_exception_if(!vcpu_has_##feat(), EXC_UD) @@ -5183,6 +5184,8 @@ x86_emulate( { unsigned long zero = 0; + vcpu_must_have(clzero); + base = ad_bytes == 8 ? _regs.r(ax) : ad_bytes == 4 ? _regs.eax : _regs.ax; limit = 0;
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> --- CC: Jan Beulich <JBeulich@suse.com> --- xen/arch/x86/x86_emulate/x86_emulate.c | 3 +++ 1 file changed, 3 insertions(+)