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Ip=[217.140.96.140]; Helo=[nebula.arm.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM3PR08MB0216 Cc: sstabellini@kernel.org, wei.chen@arm.com, steve.capper@arm.com, Kaly.Xin@arm.com, julien.grall@arm.com, nd@arm.com Subject: [Xen-devel] [PATCH v3 07/19] xen/arm: Introduce a command line parameter for SErrors/Aborts X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP In order to distinguish guest-generated SErrors from hypervisor-generated SErrors we have to place SError checking code in every EL1 <-> EL2 paths. That will cause overhead on entries and exits due to dsb/isb. However, not all platforms want to categorize SErrors. For example, a host that is running with trusted guests. The administrator can confirm that all guests that are running on the host will not trigger such SErrors. In this use-case, we should provide some options to administrators to avoid categorizing SErrors and then reduce the overhead of dsb/isb. We provided the following 3 options to administrators to determine how the hypervisors handle SErrors: * `diverse`: The hypervisor will distinguish guest SErrors from hypervisor SErrors. The guest generated SErrors will be forwarded to guests, the hypervisor generated SErrors will cause the whole system to crash. It requires: 1. dsb/isb on all EL1 -> EL2 trap entries to categorize SErrors correctly. 2. dsb/isb on EL2 -> EL1 return paths to prevent slipping hypervisor SErrors to guests. 3. dsb/isb in context switch to isolate SErrors between 2 vCPUs. * `forward`: The hypervisor will not distinguish guest SErrors from hypervisor SErrors. All SErrors will be forwarded to guests, except the SErrors generated when the idle vCPU is running. The idle domain doesn't have the ability to handle SErrors, so we have to crash the whole system when we get SErros with the idle vCPU. This option will avoid most overhead of the dsb/isb, except the dsb/isb in context switch which is used to isolate the SErrors between 2 vCPUs. * `panic`: The hypervisor will not distinguish guest SErrors from hypervisor SErrors. All SErrors will crash the whole system. This option will avoid all overhead of the dsb/isb pairs. Signed-off-by: Wei Chen Reviewed-by: Stefano Stabellini --- v2->v3: 1. Replace "entries" to "entries and exits" in commit message and doc. because all options will take effect on entries and exits. 2. Fix a typo in commit message. --- docs/misc/xen-command-line.markdown | 44 +++++++++++++++++++++++++++++++++++++ xen/arch/arm/traps.c | 19 ++++++++++++++++ 2 files changed, 63 insertions(+) diff --git a/docs/misc/xen-command-line.markdown b/docs/misc/xen-command-line.markdown index 9eb85d6..9d42b6a 100644 --- a/docs/misc/xen-command-line.markdown +++ b/docs/misc/xen-command-line.markdown @@ -1470,6 +1470,50 @@ enabling more sockets and cores to go into deeper sleep states. Set the serial transmit buffer size. +### serrors (ARM) +> `= diverse | forward | panic` + +> Default: `diverse` + +This parameter is provided to administrators to determine how the +hypervisors handle SErrors. + +In order to distinguish guest-generated SErrors from hypervisor-generated +SErrors we have to place SError checking code in every EL1 <-> EL2 paths. +That will cause overhead on entries and exits due to dsb/isb. However, not all +platforms need to categorize SErrors. For example, a host that is running with +trusted guests. The administrator can confirm that all guests that are running +on the host will not trigger such SErrors. In this case, the administrator can +use this parameter to skip categorizing SErrors and reduce the overhead of +dsb/isb. + +We provided the following 3 options to administrators to determine how the +hypervisors handle SErrors: + +* `diverse`: + The hypervisor will distinguish guest SErrors from hypervisor SErrors. + The guest generated SErrors will be forwarded to guests, the hypervisor + generated SErrors will cause the whole system to crash. + It requires: + 1. dsb/isb on all EL1 -> EL2 trap entries to categorize SErrors correctly. + 2. dsb/isb on EL2 -> EL1 return paths to prevent slipping hypervisor + SErrors to guests. + 3. dsb/isb in context switch to isolate SErrors between 2 vCPUs. + +* `forward`: + The hypervisor will not distinguish guest SErrors from hypervisor SErrors. + All SErrors will be forwarded to guests, except the SErrors generated when + the idle vCPU is running. The idle domain doesn't have the ability to handle + SErrors, so we have to crash the whole system when we get SErros with the + idle vCPU. This option will avoid most overhead of the dsb/isb, except the + dsb/isb in context switch which is used to isolate the SErrors between 2 + vCPUs. + +* `panic`: + The hypervisor will not distinguish guest SErrors from hypervisor SErrors. + All SErrors will crash the whole system. This option will avoid all overhead + of the dsb/isb pairs. + ### smap > `= | hvm` diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index b15923a..76cda59 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -122,6 +122,25 @@ register_t get_default_hcr_flags(void) HCR_TSC|HCR_TAC|HCR_SWIO|HCR_TIDCP|HCR_FB); } +static enum { + SERRORS_DIVERSE, + SERRORS_FORWARD, + SERRORS_PANIC, +} serrors_op; + +static void __init parse_serrors_behavior(const char *str) +{ + if ( !strcmp(str, "forward") ) + serrors_op = SERRORS_FORWARD; + else if ( !strcmp(str, "panic") ) + serrors_op = SERRORS_PANIC; + else + serrors_op = SERRORS_DIVERSE; + + return; +} +custom_param("serrors", parse_serrors_behavior); + void init_traps(void) { /* Setup Hyp vector base */