From patchwork Wed Apr 5 23:19:11 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 9665899 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3A0DA60352 for ; Wed, 5 Apr 2017 23:23:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2C5D22816B for ; Wed, 5 Apr 2017 23:23:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2106F28584; Wed, 5 Apr 2017 23:23:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9323A2816B for ; Wed, 5 Apr 2017 23:23:10 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cvuEf-0004xH-Hv; Wed, 05 Apr 2017 23:21:09 +0000 Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cvuEe-0004tw-8d for xen-devel@lists.xenproject.org; Wed, 05 Apr 2017 23:21:08 +0000 Received: from [85.158.143.35] by server-10.bemta-6.messagelabs.com id 14/D7-13192-3EB75E85; Wed, 05 Apr 2017 23:21:07 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrMLMWRWlGSWpSXmKPExsVysyfVTfdR9dM IgxuPrCy+b5nM5MDocfjDFZYAxijWzLyk/IoE1ox9G9oYCxqlKr70XWdqYFwu0sXIxSEksIlR 4tn1XtYuRk4gZy+jxOrp/CA2m4CuxI6br5lBbBGBUIk5Px8B2RwczAKVEt2LwEqEBSwlFrf8A ythEVCVaPrTyw5i8wq4S9z41MgCUi4hICdx5V8CSJgTKPyy9RgLxCY3iWsTp7JMYORewMiwil G9OLWoLLVI10gvqSgzPaMkNzEzR9fQwEwvN7W4ODE9NScxqVgvOT93EyPQswxAsINx2V+nQ4y SHExKorwKPk8ihPiS8lMqMxKLM+KLSnNSiw8xynBwKEnw8gEDRUiwKDU9tSItMwcYYjBpCQ4e JRFeqyqgNG9xQWJucWY6ROoUo6KUOC8vSJ8ASCKjNA+uDRbWlxhlpYR5GYEOEeIpSC3KzSxBl X/FKM7BqCTMOwVkPE9mXgnc9FdAi5mAFj+58xBkcUkiQkqqgXHxNrv7OkYVb8PT9j9TLjZ44r IgT0A8zPbbJ9svTa/TN5hE3lu+WW2v2JnU/S0LE/5MlNG7OlNNRkJZ0jpjktEKtWiRSVL6dXw HJqfd4m7fPdlzz5bbnPH+RUHblG2taveaPFn09nz/8vfTKz0mVuzZoL3o5ZVe9ZaH7dwnjYNi LI3Es12UtiqxFGckGmoxFxUnAgC/2DhcZgIAAA== X-Env-Sender: andre.przywara@arm.com X-Msg-Ref: server-14.tower-21.messagelabs.com!1491434466!55788519!1 X-Originating-IP: [217.140.101.70] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 9.4.12; banners=-,-,- X-VirusChecked: Checked Received: (qmail 44128 invoked from network); 5 Apr 2017 23:21:06 -0000 Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by server-14.tower-21.messagelabs.com with SMTP; 5 Apr 2017 23:21:06 -0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 37388B16; Wed, 5 Apr 2017 16:21:06 -0700 (PDT) Received: from slackpad.lan (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EA9BB3F4FF; Wed, 5 Apr 2017 16:21:04 -0700 (PDT) From: Andre Przywara To: Stefano Stabellini , Julien Grall Date: Thu, 6 Apr 2017 00:19:11 +0100 Message-Id: <1491434362-30310-20-git-send-email-andre.przywara@arm.com> X-Mailer: git-send-email 2.8.2 In-Reply-To: <1491434362-30310-1-git-send-email-andre.przywara@arm.com> References: <1491434362-30310-1-git-send-email-andre.przywara@arm.com> Cc: xen-devel@lists.xenproject.org, Shanker Donthineni , Vijay Kilari Subject: [Xen-devel] [PATCH v5 19/30] ARM: vITS: handle CLEAR command X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This introduces the ITS command handler for the CLEAR command, which clears the pending state of an LPI. This removes a not-yet injected, but already queued IRQ from a VCPU. As read_itte() is now eventually used, we add the static keyword. Signed-off-by: Andre Przywara --- xen/arch/arm/vgic-v3-its.c | 49 ++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 47 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c index a145666..71bc08a 100644 --- a/xen/arch/arm/vgic-v3-its.c +++ b/xen/arch/arm/vgic-v3-its.c @@ -191,8 +191,8 @@ static bool read_itte_locked(struct virt_its *its, uint32_t devid, * This function takes care of the locking by taking the its_lock itself, so * a caller shall not hold this. Before returning, the lock is dropped again. */ -bool read_itte(struct virt_its *its, uint32_t devid, uint32_t evid, - struct vcpu **vcpu_ptr, uint32_t *vlpi_ptr) +static bool read_itte(struct virt_its *its, uint32_t devid, uint32_t evid, + struct vcpu **vcpu_ptr, uint32_t *vlpi_ptr) { bool ret; @@ -277,6 +277,48 @@ static uint64_t its_cmd_mask_field(uint64_t *its_cmd, unsigned int word, #define its_cmd_get_validbit(cmd) its_cmd_mask_field(cmd, 2, 63, 1) #define its_cmd_get_ittaddr(cmd) (its_cmd_mask_field(cmd, 2, 8, 44) << 8) +/* + * CLEAR removes the pending state from an LPI. */ +static int its_handle_clear(struct virt_its *its, uint64_t *cmdptr) +{ + uint32_t devid = its_cmd_get_deviceid(cmdptr); + uint32_t eventid = its_cmd_get_id(cmdptr); + struct pending_irq *p; + struct vcpu *vcpu; + uint32_t vlpi; + unsigned long flags; + + /* Translate the DevID/EvID pair into a vCPU/vLPI pair. */ + if ( !read_itte(its, devid, eventid, &vcpu, &vlpi) ) + return -1; + + p = its->d->arch.vgic.handler->lpi_to_pending(its->d, vlpi); + if ( !p ) + return -1; + + spin_lock_irqsave(&vcpu->arch.vgic.lock, flags); + + /* We store the pending bit for LPIs in our struct pending_irq. */ + clear_bit(GIC_IRQ_GUEST_LPI_PENDING, &p->status); + + /* + * If the LPI is already visible on the guest, it is too late to + * clear the pending state. However this is a benign race that can + * happen on real hardware, too: If the LPI has already been forwarded + * to a CPU interface, a CLEAR request reaching the redistributor has + * no effect on that LPI anymore. Since LPIs are edge triggered and + * have no active state, we don't need to care about this here. + */ + if ( !test_bit(GIC_IRQ_GUEST_VISIBLE, &p->status) ) + { + /* Remove a pending, but not yet injected guest IRQ. */ + clear_bit(GIC_IRQ_GUEST_QUEUED, &p->status); + gic_remove_from_queues(vcpu, vlpi); + } + + return 0; +} + #define ITS_CMD_BUFFER_SIZE(baser) ((((baser) & 0xff) + 1) << 12) /* @@ -305,6 +347,9 @@ static int vgic_its_handle_cmds(struct domain *d, struct virt_its *its) switch ( its_cmd_get_command(command) ) { + case GITS_CMD_CLEAR: + ret = its_handle_clear(its, command); + break; case GITS_CMD_SYNC: /* We handle ITS commands synchronously, so we ignore SYNC. */ break;