From patchwork Wed Apr 5 23:19:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 9665871 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7106160352 for ; Wed, 5 Apr 2017 23:22:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 619792816B for ; Wed, 5 Apr 2017 23:22:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 54F7C28584; Wed, 5 Apr 2017 23:22:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id EFFB62816B for ; Wed, 5 Apr 2017 23:22:47 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cvuEs-0005MW-Lr; Wed, 05 Apr 2017 23:21:22 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cvuEq-0005IB-QT for xen-devel@lists.xenproject.org; Wed, 05 Apr 2017 23:21:20 +0000 Received: from [85.158.137.68] by server-3.bemta-3.messagelabs.com id 2F/06-14551-0FB75E85; Wed, 05 Apr 2017 23:21:20 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrCLMWRWlGSWpSXmKPExsVysyfVTfd99dM IgxUXZCy+b5nM5MDocfjDFZYAxijWzLyk/IoE1oyzi6+wFXyWrDi77StzA+ME4S5GLg4hgU2M Evu67rFCOHsZJR7dvMrWxcjJwSagK7Hj5mtmEFtEIFRizs9HQDYHB7NApUT3In6QsLCAlcTxh 8+YQGwWAVWJo42LGEFsXgF3iW2np7GBlEsIyElc+ZcAEuYECr9sPcYCYgsJuElcmziVZQIj9w JGhlWM6sWpRWWpRbqGeklFmekZJbmJmTm6hgbGermpxcWJ6ak5iUnFesn5uZsYgb5lAIIdjMs /Oh1ilORgUhLlVfB5EiHEl5SfUpmRWJwRX1Sak1p8iFGGg0NJgpcPGCpCgkWp6akVaZk5wCCD SUtw8CiJ8GqDpHmLCxJzizPTIVKnGBWlxHl5QRICIImM0jy4NlhgX2KUlRLmZQQ6RIinILUoN 7MEVf4VozgHo5IwryfIFJ7MvBK46a+AFjMBLX5y5yHI4pJEhJRUA6OTXbvQiosnZ++ewiSw9v m5SjHHqRyq9QdN1r2qcJn7fcWnax1HD9xxP2rx8bDY1RvCrobMH1R5Eszm2FqWuiQ6Lk91mCF 9KkMzI7/vLkvbHEm9usWrEw9/tX3Xpt/AWKaybkulJFdP9wLG81l/vN1Fvi8Is7LZXrP2VMWt 3yrSWZfX+xk9v6fEUpyRaKjFXFScCAAUYuP9ZwIAAA== X-Env-Sender: andre.przywara@arm.com X-Msg-Ref: server-14.tower-31.messagelabs.com!1491434478!94414949!1 X-Originating-IP: [217.140.101.70] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 9.2.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 1940 invoked from network); 5 Apr 2017 23:21:19 -0000 Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by server-14.tower-31.messagelabs.com with SMTP; 5 Apr 2017 23:21:19 -0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AED6EB16; Wed, 5 Apr 2017 16:21:18 -0700 (PDT) Received: from slackpad.lan (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6D9973F4FF; Wed, 5 Apr 2017 16:21:17 -0700 (PDT) From: Andre Przywara To: Stefano Stabellini , Julien Grall Date: Thu, 6 Apr 2017 00:19:19 +0100 Message-Id: <1491434362-30310-28-git-send-email-andre.przywara@arm.com> X-Mailer: git-send-email 2.8.2 In-Reply-To: <1491434362-30310-1-git-send-email-andre.przywara@arm.com> References: <1491434362-30310-1-git-send-email-andre.przywara@arm.com> Cc: xen-devel@lists.xenproject.org, Shanker Donthineni , Vijay Kilari Subject: [Xen-devel] [PATCH v5 27/30] ARM: vITS: handle INVALL command X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP The INVALL command instructs an ITS to invalidate the configuration data for all LPIs associated with a given redistributor (read: VCPU). This is nasty to emulate exactly with our architecture, so we just iterate over all mapped LPIs and filter for those from that particular VCPU. Signed-off-by: Andre Przywara --- xen/arch/arm/vgic-v3-its.c | 62 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c index 0d4b20d..9684b3a 100644 --- a/xen/arch/arm/vgic-v3-its.c +++ b/xen/arch/arm/vgic-v3-its.c @@ -469,6 +469,65 @@ static int its_handle_inv(struct virt_its *its, uint64_t *cmdptr) return 0; } +/* + * INVALL updates the per-LPI configuration status for every LPI mapped to + * a particular redistributor. + * We iterate over all mapped LPIs in our radix tree and update those. + */ +static int its_handle_invall(struct virt_its *its, uint64_t *cmdptr) +{ + uint32_t collid = its_cmd_get_collection(cmdptr); + struct vcpu *vcpu; + struct pending_irq *pirqs[16]; + uint64_t vlpi = 0; /* 64-bit to catch overflows */ + unsigned int nr_lpis, i; + int ret = 0; + + /* + * As this implementation walks over all mapped LPIs, it might take + * too long for a real guest, so we might want to revisit this + * implementation for DomUs. + * However this command is very rare, also we don't expect many + * LPIs to be actually mapped, so it's fine for Dom0 to use. + */ + ASSERT(is_hardware_domain(its->d)); + + spin_lock(&its->its_lock); + vcpu = get_vcpu_from_collection(its, collid); + spin_unlock(&its->its_lock); + + read_lock(&its->d->arch.vgic.pend_lpi_tree_lock); + + do + { + nr_lpis = radix_tree_gang_lookup(&its->d->arch.vgic.pend_lpi_tree, + (void **)pirqs, vlpi, + ARRAY_SIZE(pirqs)); + + for ( i = 0; i < nr_lpis; i++ ) + { + /* We only care about LPIs on our VCPU. */ + if ( pirqs[i]->vcpu_id != vcpu->vcpu_id ) + continue; + + vlpi = pirqs[i]->irq; + /* If that fails for a single LPI, carry on to handle the rest. */ + if ( update_lpi_enabled_status(its->d, vcpu, vlpi) ) + ret = -1; + } + /* + * Loop over the next gang of pending_irqs until we reached the end of + * a (fully populated) tree or the lookup function returns less LPIs than + * it has been asked for. + */ + } while ( (++vlpi < its->d->arch.vgic.nr_lpis) && + (nr_lpis == ARRAY_SIZE(pirqs)) ); + + read_unlock(&its->d->arch.vgic.pend_lpi_tree_lock); + + return ret; +} + static int its_handle_mapc(struct virt_its *its, uint64_t *cmdptr) { uint32_t collid = its_cmd_get_collection(cmdptr); @@ -711,6 +770,9 @@ static int vgic_its_handle_cmds(struct domain *d, struct virt_its *its) case GITS_CMD_INV: ret = its_handle_inv(its, command); break; + case GITS_CMD_INVALL: + ret = its_handle_invall(its, command); + break; case GITS_CMD_MAPC: ret = its_handle_mapc(its, command); break;