From patchwork Wed Apr 26 00:52:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chao Gao X-Patchwork-Id: 9700543 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 85E24603F4 for ; Wed, 26 Apr 2017 07:58:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 737592844E for ; Wed, 26 Apr 2017 07:58:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 681AE285EA; Wed, 26 Apr 2017 07:58:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=BAYES_00, DATE_IN_PAST_06_12, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id F3E162844E for ; Wed, 26 Apr 2017 07:58:21 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1d3Hnw-0003Q1-1H; Wed, 26 Apr 2017 07:56:04 +0000 Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1d3Hnv-0003Pj-6f for xen-devel@lists.xen.org; Wed, 26 Apr 2017 07:56:03 +0000 Received: from [85.158.143.35] by server-1.bemta-6.messagelabs.com id F2/FC-03869-29250095; Wed, 26 Apr 2017 07:56:02 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrNLMWRWlGSWpSXmKPExsXS1tbhqDsxiCH S4P1EM4slHxezODB6HN39mymAMYo1My8pvyKBNWPm/72sBdNUK1bMfc3WwPhctouRi0NIYBqj xLyG++xdjJwcEgK8EkeWzWCFsP0lpqzfCmYLCZRLnOh9xghiswkoS1z82ssGYosISEtc+3yZE WQQs8BmJokDC26DDRIWsJA42t3BAmKzCKhKHG+bwQxi8wo4Sey7/4oZYoGCxJSH78FsTgFniT WdzUwQy5wk5v2YyTSBkXcBI8MqRo3i1KKy1CJdYwO9pKLM9IyS3MTMHF1DAzO93NTi4sT01Jz EpGK95PzcTYzAgGAAgh2Mf9cGHmKU5GBSEuWtn/wvQogvKT+lMiOxOCO+qDQntfgQowwHh5IE r1ogQ6SQYFFqempFWmYOMDRh0hIcPEoivPwgad7igsTc4sx0iNQpRl2Od0s/vGcSYsnLz0uVE uc1BikSACnKKM2DGwGLk0uMslLCvIxARwnxFKQW5WaWoMq/YhTnYFQS5o0CmcKTmVcCt+kV0B FMQEewuIAdUZKIkJJqYOz0PrJl65Qj4uriKQUaW0v5ljse/ZHQ80xeI0GgdaHThAlz2Ve/7Za osDbmOVe+003pUsdehsdt6yVOXTjW5R+tYiuySe6dy8tp6sn3WA7ZJse3tjju7NtR6HFXK1h7 6VLWa+XaN0QP7M3QeeGYWDpDcsf21VUGNUvvH8nKZuF2mur+9RdHgBJLcUaioRZzUXEiAE0jI /SOAgAA X-Env-Sender: chao.gao@intel.com X-Msg-Ref: server-16.tower-21.messagelabs.com!1493193358!60866480!2 X-Originating-IP: [134.134.136.65] X-SpamReason: No, hits=0.8 required=7.0 tests=DATE_IN_PAST_06_12 X-StarScan-Received: X-StarScan-Version: 9.4.12; banners=-,-,- X-VirusChecked: Checked Received: (qmail 41607 invoked from network); 26 Apr 2017 07:56:01 -0000 Received: from mga03.intel.com (HELO mga03.intel.com) (134.134.136.65) by server-16.tower-21.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 26 Apr 2017 07:56:01 -0000 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Apr 2017 00:55:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,253,1488873600"; d="scan'208";a="961211961" Received: from skl-2s3.sh.intel.com ([10.239.48.51]) by orsmga003.jf.intel.com with ESMTP; 26 Apr 2017 00:55:53 -0700 From: Chao Gao To: xen-devel@lists.xen.org Date: Wed, 26 Apr 2017 08:52:44 +0800 Message-Id: <1493167967-74144-2-git-send-email-chao.gao@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1493167967-74144-1-git-send-email-chao.gao@intel.com> References: <1493167967-74144-1-git-send-email-chao.gao@intel.com> Cc: Kevin Tian , Wei Liu , Jan Beulich , George Dunlap , Andrew Cooper , Ian Jackson , Jun Nakajima , Chao Gao Subject: [Xen-devel] [PATCH 1/4] xentrace: add TRC_HVM_VT_D_PI_BLOCK X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This patch adds TRC_HVM_VT_D_PI_BLOCK to track adding one entry to the per-pcpu blocking list. Also introduce a 'counter' to track the number of entries in the list. Signed-off-by: Chao Gao --- tools/xentrace/formats | 1 + xen/arch/x86/hvm/vmx/vmx.c | 10 +++++++++- xen/include/asm-x86/hvm/trace.h | 1 + xen/include/public/trace.h | 1 + 4 files changed, 12 insertions(+), 1 deletion(-) diff --git a/tools/xentrace/formats b/tools/xentrace/formats index 8b31780..ecfa955 100644 --- a/tools/xentrace/formats +++ b/tools/xentrace/formats @@ -125,6 +125,7 @@ 0x00082020 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) INTR_WINDOW [ value = 0x%(1)08x ] 0x00082021 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) NPF [ gpa = 0x%(2)08x%(1)08x mfn = 0x%(4)08x%(3)08x qual = 0x%(5)04x p2mt = 0x%(6)04x ] 0x00082023 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) TRAP [ vector = 0x%(1)02x ] +0x00082026 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) PI_BLOCK_LIST [ domid = 0x%(1)04x vcpu = 0x%(2)04x, pcpu = 0x%(3)04x, #entry = 0x%(4)04x ] 0x0010f001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) page_grant_map [ domid = %(1)d ] 0x0010f002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) page_grant_unmap [ domid = %(1)d ] diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index f8d3c17..a2dac56 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -82,6 +82,7 @@ static int vmx_vmfunc_intercept(struct cpu_user_regs *regs); struct vmx_pi_blocking_vcpu { struct list_head list; spinlock_t lock; + atomic_t counter; }; /* @@ -119,6 +120,9 @@ static void vmx_vcpu_block(struct vcpu *v) */ ASSERT(old_lock == NULL); + atomic_inc(&per_cpu(vmx_pi_blocking, v->processor).counter); + HVMTRACE_4D(VT_D_PI_BLOCK, v->domain->domain_id, v->vcpu_id, v->processor, + atomic_read(&per_cpu(vmx_pi_blocking, v->processor).counter)); list_add_tail(&v->arch.hvm_vmx.pi_blocking.list, &per_cpu(vmx_pi_blocking, v->processor).list); spin_unlock_irqrestore(pi_blocking_list_lock, flags); @@ -186,6 +190,8 @@ static void vmx_pi_unblock_vcpu(struct vcpu *v) { ASSERT(v->arch.hvm_vmx.pi_blocking.lock == pi_blocking_list_lock); list_del(&v->arch.hvm_vmx.pi_blocking.list); + atomic_dec(&container_of(pi_blocking_list_lock, + struct vmx_pi_blocking_vcpu, lock)->counter); v->arch.hvm_vmx.pi_blocking.lock = NULL; } @@ -234,6 +240,7 @@ void vmx_pi_desc_fixup(unsigned int cpu) if ( pi_test_on(&vmx->pi_desc) ) { list_del(&vmx->pi_blocking.list); + atomic_dec(&per_cpu(vmx_pi_blocking, cpu).counter); vmx->pi_blocking.lock = NULL; vcpu_unblock(container_of(vmx, struct vcpu, arch.hvm_vmx)); } @@ -2360,7 +2367,7 @@ static void pi_wakeup_interrupt(struct cpu_user_regs *regs) struct arch_vmx_struct *vmx, *tmp; spinlock_t *lock = &per_cpu(vmx_pi_blocking, smp_processor_id()).lock; struct list_head *blocked_vcpus = - &per_cpu(vmx_pi_blocking, smp_processor_id()).list; + &per_cpu(vmx_pi_blocking, smp_processor_id()).list; ack_APIC_irq(); this_cpu(irq_count)++; @@ -2377,6 +2384,7 @@ static void pi_wakeup_interrupt(struct cpu_user_regs *regs) if ( pi_test_on(&vmx->pi_desc) ) { list_del(&vmx->pi_blocking.list); + atomic_dec(&per_cpu(vmx_pi_blocking, smp_processor_id()).counter); ASSERT(vmx->pi_blocking.lock == lock); vmx->pi_blocking.lock = NULL; vcpu_unblock(container_of(vmx, struct vcpu, arch.hvm_vmx)); diff --git a/xen/include/asm-x86/hvm/trace.h b/xen/include/asm-x86/hvm/trace.h index de802a6..d122c70 100644 --- a/xen/include/asm-x86/hvm/trace.h +++ b/xen/include/asm-x86/hvm/trace.h @@ -54,6 +54,7 @@ #define DO_TRC_HVM_TRAP DEFAULT_HVM_MISC #define DO_TRC_HVM_TRAP_DEBUG DEFAULT_HVM_MISC #define DO_TRC_HVM_VLAPIC DEFAULT_HVM_MISC +#define DO_TRC_HVM_VT_D_PI_BLOCK DEFAULT_HVM_MISC #define TRC_PAR_LONG(par) ((par)&0xFFFFFFFF),((par)>>32) diff --git a/xen/include/public/trace.h b/xen/include/public/trace.h index 7f2e891..a50c089 100644 --- a/xen/include/public/trace.h +++ b/xen/include/public/trace.h @@ -234,6 +234,7 @@ #define TRC_HVM_TRAP (TRC_HVM_HANDLER + 0x23) #define TRC_HVM_TRAP_DEBUG (TRC_HVM_HANDLER + 0x24) #define TRC_HVM_VLAPIC (TRC_HVM_HANDLER + 0x25) +#define TRC_HVM_VT_D_PI_BLOCK (TRC_HVM_HANDLER + 0x26) #define TRC_HVM_IOPORT_WRITE (TRC_HVM_HANDLER + 0x216) #define TRC_HVM_IOMEM_WRITE (TRC_HVM_HANDLER + 0x217)