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[85.223.209.52]) by smtp.gmail.com with ESMTPSA id v19sm4476460ljd.9.2017.07.05.09.29.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 05 Jul 2017 09:29:42 -0700 (PDT) From: Andrii Anisov To: xen-devel@lists.xen.org Date: Wed, 5 Jul 2017 19:29:18 +0300 Message-Id: <1499272159-18390-2-git-send-email-andrii.anisov@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499272159-18390-1-git-send-email-andrii.anisov@gmail.com> References: <1499272159-18390-1-git-send-email-andrii.anisov@gmail.com> Cc: Andrii Anisov , Iurii Konovalenko , Iurii Mykhalskyi Subject: [Xen-devel] [PATCH 1/2] xen:arm64: Add SCIF UART support for earlyprintk X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Iurii Konovalenko Add support for a SCIF compatible UART found in Renesas R-Car Gen3 SoCs. Signed-off-by: Iurii Konovalenko Signed-off-by: Iurii Mykhalskyi Signed-off-by: Andrii Anisov --- xen/arch/arm/arm64/debug-scif.inc | 51 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 xen/arch/arm/arm64/debug-scif.inc diff --git a/xen/arch/arm/arm64/debug-scif.inc b/xen/arch/arm/arm64/debug-scif.inc new file mode 100644 index 0000000..1f4d657 --- /dev/null +++ b/xen/arch/arm/arm64/debug-scif.inc @@ -0,0 +1,51 @@ +/* + * xen/arch/arm/arm64/debug-scif.inc + * + * SCIF specific debug code + * + * Oleksandr Tyshchenko + * Iurii Konovalenko + * Iurii Mykhalskyi + * Copyright (C) 2014-2016, Globallogic. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include + +/* SCIF UART wait UART to be ready to transmit + * rb: register which contains the UART base address + * rc: scratch register + */ +.macro early_uart_ready xb c +1: + ldrh w\c, [\xb, #SCIF_SCFSR] /* <- SCFSR (status register) */ + tst w\c, #SCFSR_TDFE /* Check TDFE bit */ + beq 1b /* Wait for the UART to be ready */ +.endm + +/* SCIF UART transmit character + * rb: register which contains the UART base address + * rt: register which contains the character to transmit + */ +.macro early_uart_transmit xb wt + strb \wt, [\xb, #SCIF_SCFTDR] /* -> SCFTDR (data register) */ + ldrh \wt, [\xb, #SCIF_SCFSR] /* <- SCFSR (status register) */ + and \wt, \wt, #(~(SCFSR_TEND | SCFSR_TDFE)) /* Clear TEND and TDFE bits */ + strh \wt, [\xb, #SCIF_SCFSR] /* -> SCFSR (status register) */ +.endm + +/* + * Local variables: + * mode: ASM + * indent-tabs-mode: nil + * End: + */