From patchwork Wed Jul 19 11:57:53 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Cooper X-Patchwork-Id: 9851875 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8DD5560392 for ; Wed, 19 Jul 2017 12:00:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7A699274D0 for ; Wed, 19 Jul 2017 12:00:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6F15028426; Wed, 19 Jul 2017 12:00:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C21D6274D0 for ; Wed, 19 Jul 2017 12:00:16 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dXncC-0005L5-Qs; Wed, 19 Jul 2017 11:58:04 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dXncB-0005Jx-29 for xen-devel@lists.xen.org; Wed, 19 Jul 2017 11:58:03 +0000 Received: from [85.158.139.211] by server-3.bemta-5.messagelabs.com id 03/9E-02033-A494F695; Wed, 19 Jul 2017 11:58:02 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprEIsWRWlGSWpSXmKPExsXitHRDpK6nZ36 kwbtGE4slHxezODB6HN39mymAMYo1My8pvyKBNePWxWfsBf80Kh48ucrewLhEoYuRk0NCwF9i +8M1bCA2m4C+xO4Xn5hAbBEBdYnTHRdZuxi5OJgFTjBKzOyewAySEBaIkzh/agYjiM0ioCrxa eNvVhCbV8BT4tvBO2wQQ+Ukzh//CVbPKeAl0fTwIwuILQRU83P/JWYIW03iWv8ldoheQYmTM5 +A1TALSEgcfPGCeQIj7ywkqVlIUgsYmVYxahSnFpWlFukaWeglFWWmZ5TkJmbm6BoamOrlphY XJ6an5iQmFesl5+duYgSGTz0DA+MOxr5VfocYJTmYlER55/DmRwrxJeWnVGYkFmfEF5XmpBYf YpTh4FCS4LXzAMoJFqWmp1akZeYAAxkmLcHBoyTCqw2S5i0uSMwtzkyHSJ1i1OV4NeH/NyYhl rz8vFQpcV5ekCIBkKKM0jy4EbCousQoKyXMy8jAwCDEU5BalJtZgir/ilGcg1FJmLcVZApPZl 4J3KZXQEcwAR0h7JsDckRJIkJKqoHR7vKfLW4XHqjuM4/xvOaxl3Ehr1aLuoGkb5wvb7uW8bW uv9uZrzkec9gXtHd23okt+/qO8/VIRJ+YtU9ULovTfWYNR6mgUOUpK85qD43K/BqHTXfb37/9 mLAvpS1KWHvK7dIrs9UDTThlj3X9j9R8JX8qd8qrE53199kK43/+l10T3HPqaJUSS3FGoqEWc 1FxIgBxfwb5pQIAAA== X-Env-Sender: prvs=366acc0af=Andrew.Cooper3@citrix.com X-Msg-Ref: server-12.tower-206.messagelabs.com!1500465479!67289619!2 X-Originating-IP: [66.165.176.89] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni44OSA9PiAyMDMwMDc=\n, received_headers: No Received headers X-StarScan-Received: X-StarScan-Version: 9.4.25; banners=-,-,- X-VirusChecked: Checked Received: (qmail 2647 invoked from network); 19 Jul 2017 11:58:01 -0000 Received: from smtp.citrix.com (HELO SMTP.CITRIX.COM) (66.165.176.89) by server-12.tower-206.messagelabs.com with RC4-SHA encrypted SMTP; 19 Jul 2017 11:58:01 -0000 X-IronPort-AV: E=Sophos;i="5.40,380,1496102400"; d="scan'208";a="432075291" From: Andrew Cooper To: Xen-devel Date: Wed, 19 Jul 2017 12:57:53 +0100 Message-ID: <1500465477-23793-3-git-send-email-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1500465477-23793-1-git-send-email-andrew.cooper3@citrix.com> References: <1500465477-23793-1-git-send-email-andrew.cooper3@citrix.com> MIME-Version: 1.0 Cc: Boris Ostrovsky , Andrew Cooper , Kevin Tian , Jun Nakajima , Jan Beulich Subject: [Xen-devel] [PATCH 2/6] x86/vpmu: Use vmx_{clear, set}_msr_intercept() rather than opencoding them X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Boris Ostrovsky --- CC: Jan Beulich CC: Jun Nakajima CC: Kevin Tian CC: Boris Ostrovsky --- xen/arch/x86/cpu/vpmu_intel.c | 64 ++++++++++++++++--------------------------- 1 file changed, 23 insertions(+), 41 deletions(-) diff --git a/xen/arch/x86/cpu/vpmu_intel.c b/xen/arch/x86/cpu/vpmu_intel.c index 6d768cb..d58eca3 100644 --- a/xen/arch/x86/cpu/vpmu_intel.c +++ b/xen/arch/x86/cpu/vpmu_intel.c @@ -231,68 +231,50 @@ static inline int msraddr_to_bitpos(int x) return x; } -static void core2_vpmu_set_msr_bitmap(unsigned long *msr_bitmap) +static void core2_vpmu_set_msr_bitmap(struct vcpu *v) { - int i; + unsigned int i; /* Allow Read/Write PMU Counters MSR Directly. */ for ( i = 0; i < fixed_pmc_cnt; i++ ) - { - clear_bit(msraddr_to_bitpos(MSR_CORE_PERF_FIXED_CTR0 + i), msr_bitmap); - clear_bit(msraddr_to_bitpos(MSR_CORE_PERF_FIXED_CTR0 + i), - msr_bitmap + 0x800/BYTES_PER_LONG); - } + vmx_clear_msr_intercept(v, MSR_CORE_PERF_FIXED_CTR0 + i, VMX_MSR_RW); + for ( i = 0; i < arch_pmc_cnt; i++ ) { - clear_bit(msraddr_to_bitpos(MSR_IA32_PERFCTR0+i), msr_bitmap); - clear_bit(msraddr_to_bitpos(MSR_IA32_PERFCTR0+i), - msr_bitmap + 0x800/BYTES_PER_LONG); + vmx_clear_msr_intercept(v, MSR_IA32_PERFCTR0 + i, VMX_MSR_RW); if ( full_width_write ) - { - clear_bit(msraddr_to_bitpos(MSR_IA32_A_PERFCTR0 + i), msr_bitmap); - clear_bit(msraddr_to_bitpos(MSR_IA32_A_PERFCTR0 + i), - msr_bitmap + 0x800/BYTES_PER_LONG); - } + vmx_clear_msr_intercept(v, MSR_IA32_A_PERFCTR0 + i, VMX_MSR_RW); } /* Allow Read PMU Non-global Controls Directly. */ for ( i = 0; i < arch_pmc_cnt; i++ ) - clear_bit(msraddr_to_bitpos(MSR_P6_EVNTSEL(i)), msr_bitmap); + vmx_clear_msr_intercept(v, MSR_P6_EVNTSEL(i), VMX_MSR_R); - clear_bit(msraddr_to_bitpos(MSR_CORE_PERF_FIXED_CTR_CTRL), msr_bitmap); - clear_bit(msraddr_to_bitpos(MSR_IA32_DS_AREA), msr_bitmap); + vmx_clear_msr_intercept(v, MSR_CORE_PERF_FIXED_CTR_CTRL, VMX_MSR_R); + vmx_clear_msr_intercept(v, MSR_IA32_DS_AREA, VMX_MSR_R); } -static void core2_vpmu_unset_msr_bitmap(unsigned long *msr_bitmap) +static void core2_vpmu_unset_msr_bitmap(struct vcpu *v) { - int i; + unsigned int i; for ( i = 0; i < fixed_pmc_cnt; i++ ) - { - set_bit(msraddr_to_bitpos(MSR_CORE_PERF_FIXED_CTR0 + i), msr_bitmap); - set_bit(msraddr_to_bitpos(MSR_CORE_PERF_FIXED_CTR0 + i), - msr_bitmap + 0x800/BYTES_PER_LONG); - } + vmx_set_msr_intercept(v, MSR_CORE_PERF_FIXED_CTR0 + i, VMX_MSR_RW); + for ( i = 0; i < arch_pmc_cnt; i++ ) { - set_bit(msraddr_to_bitpos(MSR_IA32_PERFCTR0 + i), msr_bitmap); - set_bit(msraddr_to_bitpos(MSR_IA32_PERFCTR0 + i), - msr_bitmap + 0x800/BYTES_PER_LONG); + vmx_set_msr_intercept(v, MSR_IA32_PERFCTR0 + i, VMX_MSR_RW); if ( full_width_write ) - { - set_bit(msraddr_to_bitpos(MSR_IA32_A_PERFCTR0 + i), msr_bitmap); - set_bit(msraddr_to_bitpos(MSR_IA32_A_PERFCTR0 + i), - msr_bitmap + 0x800/BYTES_PER_LONG); - } + vmx_set_msr_intercept(v, MSR_IA32_A_PERFCTR0 + i, VMX_MSR_RW); } for ( i = 0; i < arch_pmc_cnt; i++ ) - set_bit(msraddr_to_bitpos(MSR_P6_EVNTSEL(i)), msr_bitmap); + vmx_set_msr_intercept(v, MSR_P6_EVNTSEL(i), VMX_MSR_R); - set_bit(msraddr_to_bitpos(MSR_CORE_PERF_FIXED_CTR_CTRL), msr_bitmap); - set_bit(msraddr_to_bitpos(MSR_IA32_DS_AREA), msr_bitmap); + vmx_set_msr_intercept(v, MSR_CORE_PERF_FIXED_CTR_CTRL, VMX_MSR_R); + vmx_set_msr_intercept(v, MSR_IA32_DS_AREA, VMX_MSR_R); } static inline void __core2_vpmu_save(struct vcpu *v) @@ -327,7 +309,7 @@ static int core2_vpmu_save(struct vcpu *v, bool_t to_guest) /* Unset PMU MSR bitmap to trap lazy load. */ if ( !vpmu_is_set(vpmu, VPMU_RUNNING) && is_hvm_vcpu(v) && cpu_has_vmx_msr_bitmap ) - core2_vpmu_unset_msr_bitmap(v->arch.hvm_vmx.msr_bitmap); + core2_vpmu_unset_msr_bitmap(v); if ( to_guest ) { @@ -541,9 +523,9 @@ static int core2_vpmu_msr_common_check(u32 msr_index, int *type, int *index) { __core2_vpmu_load(current); vpmu_set(vpmu, VPMU_CONTEXT_LOADED); - if ( is_hvm_vcpu(current) && - cpu_has_vmx_msr_bitmap ) - core2_vpmu_set_msr_bitmap(current->arch.hvm_vmx.msr_bitmap); + + if ( is_hvm_vcpu(current) && cpu_has_vmx_msr_bitmap ) + core2_vpmu_set_msr_bitmap(current); } return 1; } @@ -860,7 +842,7 @@ static void core2_vpmu_destroy(struct vcpu *v) xfree(vpmu->priv_context); vpmu->priv_context = NULL; if ( is_hvm_vcpu(v) && cpu_has_vmx_msr_bitmap ) - core2_vpmu_unset_msr_bitmap(v->arch.hvm_vmx.msr_bitmap); + core2_vpmu_unset_msr_bitmap(v); release_pmu_ownership(PMU_OWNER_HVM); vpmu_clear(vpmu); }