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Tue, 19 Sep 2017 06:39:46 -0700 (PDT) From: Awais Masood To: xen-devel@lists.xenproject.org Date: Tue, 19 Sep 2017 18:38:54 +0500 Message-Id: <1505828334-29109-3-git-send-email-awais.masood@vadion.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1505828334-29109-1-git-send-email-awais.masood@vadion.com> References: <1505828334-29109-1-git-send-email-awais.masood@vadion.com> Cc: sstabellini@kernel.org, wei.liu2@citrix.com, George.Dunlap@eu.citrix.com, andrew.cooper3@citrix.com, Awais Masood , ian.jackson@eu.citrix.com, tim@xen.org, julien.grall@arm.com, jbeulich@suse.com Subject: [Xen-devel] [PATCH 2/2] xen/ns16550: Fix ISR lockup on Designware 8250 (H5) X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP On H5 (Orange Pi PC2) serial driver goes into an infinite loop as soon as interrupts are enabled. The reason being a residual "busy detect" interrupt. Since the condition UART_IIR_NOINT is not true, we'll remain in this while loop forever. A check has been added to detect "busy detect" interrupt condition and UART_USR register is read to clear the condition. Conditonal for dw_usr_busy ensures this hw quirk fix affects only designware uarts. The check during ns16550_setup_preirq call does not help on H5 because its called before LCR is set and if the busy condition appears again during subsequent LCR writes, we end up in this situation. Tested on Orange Pi PC2 Signed-off-by: Awais Masood --- xen/drivers/char/ns16550.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index 6ab5ec3..6630720 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -521,6 +521,18 @@ static void ns16550_interrupt( serial_tx_interrupt(port, regs); if ( lsr & UART_LSR_DR ) serial_rx_interrupt(port, regs); + if ( uart->dw_usr_bsy && + (ns_read_reg(uart, UART_IIR) & UART_IIR_BSY) == UART_IIR_BSY ) + { + /* If DesignWare 8250 UART became busy again when LCR was written + * earlier, it can raise a "busy detect" again. + * Read the UART Status Register to clear this state or we'll end up + * in an infinte loop because UART_IIR_NOINT is not true. + * Placing this check in setup_preirq after LCR write does not work + * probably due to a delayed interrupt. + */ + ns_read_reg(uart, UART_USR); + } } }