From patchwork Sat Oct 21 20:02:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luwei Kang X-Patchwork-Id: 10021651 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1D87C60381 for ; Sun, 22 Oct 2017 09:49:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0818A28700 for ; Sun, 22 Oct 2017 09:49:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id F130828775; Sun, 22 Oct 2017 09:49:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.2 required=2.0 tests=BAYES_00, DATE_IN_PAST_12_24, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 78AD428700 for ; Sun, 22 Oct 2017 09:49:10 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1e6Cqa-00048V-Aj; Sun, 22 Oct 2017 09:47:08 +0000 Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1e6CqZ-000476-0g for xen-devel@lists.xen.org; Sun, 22 Oct 2017 09:47:07 +0000 Received: from [193.109.254.147] by server-11.bemta-6.messagelabs.com id 0A/29-20813-A196CE95; Sun, 22 Oct 2017 09:47:06 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpgkeJIrShJLcpLzFFi42I5YG5SoSuZ+Sb S4HSDicWSj4tZHBg9ju7+zRTAGMWamZeUX5HAmrH8zzKmgqdmFX++vmBuYDyl2cXIxSEkMJ1R ounzVbYuRk4OCQFeiSPLZrB2MXIA2QESR99pg4SFBEoldjZvYwWx2QTUJba+3whmiwhIS1z7f JkRZA6zwFQmiUfbToAlhAXcJI6eWssMYrMIqEr8fj8LLM4r4CKx//FyZohdchI3z3WC2ZwCrh IX7y1hhVjmInHwfAfjBEbeBYwMqxg1ilOLylKLdI1M9ZKKMtMzSnITM3N0DQ3M9HJTi4sT01N zEpOK9ZLzczcxAsOBAQh2MK5aEHiIUZKDSUmUt+Ldq0ghvqT8lMqMxOKM+KLSnNTiQ4wyHBxK Erxf099ECgkWpaanVqRl5gADEyYtwcGjJMJ7BSTNW1yQmFucmQ6ROsVozHFs0+U/TBwdN+/+Y RJiycvPS5US5/0NUioAUppRmgc3CBYxlxhlpYR5GYFOE+IpSC3KzSxBlX/FKM7BqCTMK5ABNI UnM68Ebt8roFOYgE6RtQc7pSQRISXVwCgaIm1xNCXN0faOYcgD45oOpQVn1Gc/mMLrLxEuLyf ar3F2wieHNm89Fbu73pn5XbLFenWPf3hf5Wg/niLLsCbkFV/N3jaVhyfv7KpcxPrLQYHj0W7l A80/Kl1P++jozhQOnD4v+EDQY6+zW86w961af3XtjrSV6svf7n4gyuLbKGHyIPn5KiWW4oxEQ y3mouJEAC+VmJWTAgAA X-Env-Sender: luwei.kang@intel.com X-Msg-Ref: server-2.tower-27.messagelabs.com!1508665620!53255653!2 X-Originating-IP: [192.55.52.120] X-SpamReason: No, hits=1.0 required=7.0 tests=DATE_IN_PAST_12_24 X-StarScan-Received: X-StarScan-Version: 9.4.45; banners=-,-,- X-VirusChecked: Checked Received: (qmail 6614 invoked from network); 22 Oct 2017 09:47:05 -0000 Received: from mga04.intel.com (HELO mga04.intel.com) (192.55.52.120) by server-2.tower-27.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 22 Oct 2017 09:47:05 -0000 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Oct 2017 02:47:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.43,416,1503385200"; d="scan'208"; a="1208603513" Received: from vmm.bj.intel.com ([10.238.135.172]) by fmsmga001.fm.intel.com with ESMTP; 22 Oct 2017 02:47:02 -0700 From: Luwei Kang To: xen-devel@lists.xen.org Date: Sun, 22 Oct 2017 04:02:24 +0800 Message-Id: <1508616147-17310-4-git-send-email-luwei.kang@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1508616147-17310-1-git-send-email-luwei.kang@intel.com> References: <1508616147-17310-1-git-send-email-luwei.kang@intel.com> Cc: kevin.tian@intel.com, sstabellini@kernel.org, wei.liu2@citrix.com, jun.nakajima@intel.com, konrad.wilk@oracle.com, George.Dunlap@eu.citrix.com, andrew.cooper3@citrix.com, ian.jackson@eu.citrix.com, tim@xen.org, jbeulich@suse.com, Luwei Kang Subject: [Xen-devel] [PATCH 3/6] x86: add intel proecessor trace support for cpuid X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This patch add Intel processor trace support for cpuid handling. Signed-off-by: Luwei Kang --- tools/libxc/xc_cpuid_x86.c | 12 ++++++++++-- xen/arch/x86/cpuid.c | 22 ++++++++++++++++++++++ xen/arch/x86/domctl.c | 4 ++++ xen/include/asm-x86/cpufeature.h | 1 + xen/include/asm-x86/cpuid.h | 12 +++++++++++- xen/include/public/arch-x86/cpufeatureset.h | 1 + 6 files changed, 49 insertions(+), 3 deletions(-) diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c index d890935..0e0575c 100644 --- a/tools/libxc/xc_cpuid_x86.c +++ b/tools/libxc/xc_cpuid_x86.c @@ -38,7 +38,7 @@ enum { #define clear_feature(idx, dst) ((dst) &= ~bitmaskof(idx)) #define set_feature(idx, dst) ((dst) |= bitmaskof(idx)) -#define DEF_MAX_BASE 0x0000000du +#define DEF_MAX_BASE 0x00000014u #define DEF_MAX_INTELEXT 0x80000008u #define DEF_MAX_AMDEXT 0x8000001cu @@ -471,6 +471,7 @@ static void xc_cpuid_hvm_policy(xc_interface *xch, case 0x00000002: /* Intel cache info (dumped by AMD policy) */ case 0x00000004: /* Intel cache info (dumped by AMD policy) */ case 0x0000000a: /* Architectural Performance Monitor Features */ + case 0x00000014: /* Intel Processor Trace Features */ case 0x80000002: /* Processor name string */ case 0x80000003: /* ... continued */ case 0x80000004: /* ... continued */ @@ -757,12 +758,19 @@ int xc_cpuid_apply_policy(xc_interface *xch, domid_t domid, continue; } + if ( input[0] == 0x14 ) + { + input[1]++; + if ( input[1] == 1 ) + continue; + } + input[0]++; if ( !(input[0] & 0x80000000u) && (input[0] > base_max ) ) input[0] = 0x80000000u; input[1] = XEN_CPUID_INPUT_UNUSED; - if ( (input[0] == 4) || (input[0] == 7) ) + if ( (input[0] == 4) || (input[0] == 7) || (input[0] == 0x14) ) input[1] = 0; else if ( input[0] == 0xd ) input[1] = 1; /* Xen automatically calculates almost everything. */ diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 5ee82d3..c3d56fd 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -9,6 +9,7 @@ #include #include #include +#include const uint32_t known_features[] = INIT_KNOWN_FEATURES; const uint32_t special_features[] = INIT_SPECIAL_FEATURES; @@ -487,7 +488,19 @@ void recalculate_cpuid_policy(struct domain *d) __clear_bit(X86_FEATURE_VMX, max_fs); __clear_bit(X86_FEATURE_SVM, max_fs); } + + /* + * Hide Intel Processor trace feature when hardware not support + * PT-VMX or intel_pt option is disabled. + */ + if ( !opt_intel_pt ) + { + __clear_bit(X86_FEATURE_INTEL_PT, max_fs); + zero_leaves(p->intel_pt.raw, 0, ARRAY_SIZE(p->intel_pt.raw) - 1); + } } + else + zero_leaves(p->intel_pt.raw, 0, ARRAY_SIZE(p->intel_pt.raw) - 1); /* * Allow the toolstack to set HTT, X2APIC and CMP_LEGACY. These bits @@ -634,6 +647,15 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, *res = p->feat.raw[subleaf]; break; + case 0x14: + ASSERT(p->intel_pt.max_subleaf < ARRAY_SIZE(p->intel_pt.raw)); + if ( subleaf > min_t(uint32_t, p->intel_pt.max_subleaf, + ARRAY_SIZE(p->intel_pt.raw) - 1) ) + return; + + *res = p->intel_pt.raw[subleaf]; + break; + case XSTATE_CPUID: if ( !p->basic.xsave || subleaf >= ARRAY_SIZE(p->xstate.raw) ) return; diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 1b208f9..405b31e 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -100,6 +100,10 @@ static int update_domain_cpuid_info(struct domain *d, p->feat.raw[ctl->input[1]] = leaf; break; + case 0x14: + p->intel_pt.raw[ctl->input[1]] = leaf; + break; + case XSTATE_CPUID: p->xstate.raw[ctl->input[1]] = leaf; break; diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index 84cc51d..8956667 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -95,6 +95,7 @@ #define cpu_has_mpx boot_cpu_has(X86_FEATURE_MPX) #define cpu_has_rdseed boot_cpu_has(X86_FEATURE_RDSEED) #define cpu_has_smap boot_cpu_has(X86_FEATURE_SMAP) +#define cpu_has_intel_pt boot_cpu_has(X86_FEATURE_INTEL_PT) #define cpu_has_sha boot_cpu_has(X86_FEATURE_SHA) /* CPUID level 0x80000007.edx */ diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index d2dd841..39f06aa 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -61,10 +61,11 @@ extern struct cpuidmasks cpuidmask_defaults; /* Whether or not cpuid faulting is available for the current domain. */ DECLARE_PER_CPU(bool, cpuid_faulting_enabled); -#define CPUID_GUEST_NR_BASIC (0xdu + 1) +#define CPUID_GUEST_NR_BASIC (0x14u + 1) #define CPUID_GUEST_NR_FEAT (0u + 1) #define CPUID_GUEST_NR_CACHE (5u + 1) #define CPUID_GUEST_NR_XSTATE (62u + 1) +#define CPUID_GUEST_NR_INTEL_PT (1u + 1) #define CPUID_GUEST_NR_EXTD_INTEL (0x8u + 1) #define CPUID_GUEST_NR_EXTD_AMD (0x1cu + 1) #define CPUID_GUEST_NR_EXTD MAX(CPUID_GUEST_NR_EXTD_INTEL, \ @@ -169,6 +170,15 @@ struct cpuid_policy } comp[CPUID_GUEST_NR_XSTATE]; } xstate; + /* Structured feature leaf: 0x00000014[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_INTEL_PT]; + struct { + /* Subleaf 0. */ + uint32_t max_subleaf; + }; + } intel_pt; + /* Extended leaves: 0x800000xx */ union { struct cpuid_leaf raw[CPUID_GUEST_NR_EXTD]; diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 0ee3ea3..b5648f7 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -215,6 +215,7 @@ XEN_CPUFEATURE(SMAP, 5*32+20) /*S Supervisor Mode Access Prevention */ XEN_CPUFEATURE(AVX512IFMA, 5*32+21) /*A AVX-512 Integer Fused Multiply Add */ XEN_CPUFEATURE(CLFLUSHOPT, 5*32+23) /*A CLFLUSHOPT instruction */ XEN_CPUFEATURE(CLWB, 5*32+24) /*A CLWB instruction */ +XEN_CPUFEATURE(INTEL_PT, 5*32+25) /*H Intel Processor Trace */ XEN_CPUFEATURE(AVX512PF, 5*32+26) /*A AVX-512 Prefetch Instructions */ XEN_CPUFEATURE(AVX512ER, 5*32+27) /*A AVX-512 Exponent & Reciprocal Instrs */ XEN_CPUFEATURE(AVX512CD, 5*32+28) /*A AVX-512 Conflict Detection Instrs */