From patchwork Sat Oct 21 20:02:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luwei Kang X-Patchwork-Id: 10021647 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1FD51603D7 for ; Sun, 22 Oct 2017 09:49:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0AD4C28700 for ; Sun, 22 Oct 2017 09:49:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id F231428705; Sun, 22 Oct 2017 09:49:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.2 required=2.0 tests=BAYES_00, DATE_IN_PAST_12_24, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9DAED28775 for ; Sun, 22 Oct 2017 09:49:06 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1e6Cqd-0004AU-N8; Sun, 22 Oct 2017 09:47:11 +0000 Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1e6Cqc-00049l-Am for xen-devel@lists.xen.org; Sun, 22 Oct 2017 09:47:10 +0000 Received: from [193.109.254.147] by server-2.bemta-6.messagelabs.com id 76/A4-31897-D196CE95; Sun, 22 Oct 2017 09:47:09 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrBLMWRWlGSWpSXmKPExsVywNykQlc2802 kQYOKxZKPi1kcGD2O7v7NFMAYxZqZl5RfkcCacfnsPuaCAyIVS26yNTA2CXYxcnIICUxnlPj0 3xrElhDglTiybAYrhB0gsbLvABtETanE6TMzmEBsNgF1ia3vN4LViAhIS1z7fJmxi5GLg1lgK pPEo20nwBLCAtYS65/2MoLYLAKqEv03foI18wq4SBy78ZIdYoGcxM1zncwgNqeAq8TFe0tYIZ a5SBw838E4gZF3ASPDKkaN4tSistQiXSNTvaSizPSMktzEzBxdQwMzvdzU4uLE9NScxKRiveT 83E2MwFBgAIIdjKsWBB5ilORgUhLlrXj3KlKILyk/pTIjsTgjvqg0J7X4EKMMB4eSBO/X9DeR QoJFqempFWmZOcCghElLcPAoifBeAUnzFhck5hZnpkOkTjHqcnTcvPuHSYglLz8vVUqc9zdIk QBIUUZpHtwIWIRcYpSVEuZlBDpKiKcgtSg3swRV/hWjOAejkjCvQAbQFJ7MvBK4Ta+AjmACOk LWHuyIkkSElFQDo9/j7H9uZQlGP9WuR3lGFockLNuqyTy3qmnZdeP29ewp4U2ls6albxAUUzm juq8zVkV6FjP7gXlnFjJzCM30j5omfTzpryD7vuunlRMUDCRiVnhsmBnZNqXkyiF1n5K7zjHO vP+qGu4+8T2TePDphv8LQ6XfLJp/buJM8z0M2vHzz17bJLdfT4mlOCPRUIu5qDgRAAJc61uLA gAA X-Env-Sender: luwei.kang@intel.com X-Msg-Ref: server-2.tower-27.messagelabs.com!1508665620!53255653!3 X-Originating-IP: [192.55.52.120] X-SpamReason: No, hits=1.0 required=7.0 tests=DATE_IN_PAST_12_24 X-StarScan-Received: X-StarScan-Version: 9.4.45; banners=-,-,- X-VirusChecked: Checked Received: (qmail 6656 invoked from network); 22 Oct 2017 09:47:08 -0000 Received: from mga04.intel.com (HELO mga04.intel.com) (192.55.52.120) by server-2.tower-27.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 22 Oct 2017 09:47:08 -0000 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Oct 2017 02:47:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.43,416,1503385200"; d="scan'208"; a="1208603527" Received: from vmm.bj.intel.com ([10.238.135.172]) by fmsmga001.fm.intel.com with ESMTP; 22 Oct 2017 02:47:05 -0700 From: Luwei Kang To: xen-devel@lists.xen.org Date: Sun, 22 Oct 2017 04:02:25 +0800 Message-Id: <1508616147-17310-5-git-send-email-luwei.kang@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1508616147-17310-1-git-send-email-luwei.kang@intel.com> References: <1508616147-17310-1-git-send-email-luwei.kang@intel.com> Cc: kevin.tian@intel.com, sstabellini@kernel.org, wei.liu2@citrix.com, jun.nakajima@intel.com, konrad.wilk@oracle.com, George.Dunlap@eu.citrix.com, andrew.cooper3@citrix.com, ian.jackson@eu.citrix.com, tim@xen.org, jbeulich@suse.com, Luwei Kang Subject: [Xen-devel] [PATCH 4/6] x86: add intel processor trace context X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This patch add Intel processor trace context date structure for guest. Signed-off-by: Luwei Kang --- xen/include/asm-x86/hvm/vmx/vmcs.h | 3 +++ xen/include/asm-x86/intel_pt.h | 17 +++++++++++++++++ xen/include/asm-x86/msr-index.h | 16 ++++++++++++++++ 3 files changed, 36 insertions(+) diff --git a/xen/include/asm-x86/hvm/vmx/vmcs.h b/xen/include/asm-x86/hvm/vmx/vmcs.h index bd8a128..33ec3e6 100644 --- a/xen/include/asm-x86/hvm/vmx/vmcs.h +++ b/xen/include/asm-x86/hvm/vmx/vmcs.h @@ -20,6 +20,7 @@ #include #include +#include extern void vmcs_dump_vcpu(struct vcpu *v); extern void setup_vmcs_dump(void); @@ -171,6 +172,8 @@ struct arch_vmx_struct { * pCPU and wakeup the related vCPU. */ struct pi_blocking_vcpu pi_blocking; + + struct pt_desc pt_desc; }; int vmx_create_vmcs(struct vcpu *v); diff --git a/xen/include/asm-x86/intel_pt.h b/xen/include/asm-x86/intel_pt.h index 3b3a047..78e3a37 100644 --- a/xen/include/asm-x86/intel_pt.h +++ b/xen/include/asm-x86/intel_pt.h @@ -21,6 +21,23 @@ #ifndef __ASM_X86_HVM_INTEL_PT_H_ #define __ASM_X86_HVM_INTEL_PT_H_ +#include + +struct pt_ctx { + u64 ctl; + u64 status; + u64 output_base; + u64 output_mask_ptrs; + u64 cr3_match; + u64 addr[NUM_MSR_IA32_RTIT_ADDR]; +}; + +struct pt_desc { + bool intel_pt_enabled; + unsigned int addr_num; + struct pt_ctx guest_pt_ctx; +}; + extern bool_t opt_intel_pt; #endif /* __ASM_X86_HVM_INTEL_PT_H_ */ diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h index b99c623..d160d44 100644 --- a/xen/include/asm-x86/msr-index.h +++ b/xen/include/asm-x86/msr-index.h @@ -528,4 +528,20 @@ #define MSR_PKGC9_IRTL 0x00000634 #define MSR_PKGC10_IRTL 0x00000635 +/* Intel PT MSRs */ +#define MSR_IA32_RTIT_CTL 0x00000570 +#define MSR_IA32_RTIT_STATUS 0x00000571 +#define MSR_IA32_RTIT_CR3_MATCH 0x00000572 +#define MSR_IA32_RTIT_OUTPUT_BASE 0x00000560 +#define MSR_IA32_RTIT_OUTPUT_MASK_PTRS 0x00000561 +#define MSR_IA32_RTIT_ADDR0_A 0x00000580 +#define MSR_IA32_RTIT_ADDR0_B 0x00000581 +#define MSR_IA32_RTIT_ADDR1_A 0x00000582 +#define MSR_IA32_RTIT_ADDR1_B 0x00000583 +#define MSR_IA32_RTIT_ADDR2_A 0x00000584 +#define MSR_IA32_RTIT_ADDR2_B 0x00000585 +#define MSR_IA32_RTIT_ADDR3_A 0x00000586 +#define MSR_IA32_RTIT_ADDR3_B 0x00000587 +#define NUM_MSR_IA32_RTIT_ADDR 8 + #endif /* __ASM_MSR_INDEX_H */