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Message-Id: <E1dIkS2-0003y3-HK@xenbits.xenproject.org>
Date: Wed, 07 Jun 2017 23:33:22 +0000
Subject: [Xen-changelog] [xen master] x86/vlapic: fix two flaws in emulatin=
g
	MSR_IA32_APICBASE
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commit 4f35cb80e8813053d1cec9dc1654ceb6dd7575a0
Author:     Chao Gao <chao.gao@intel.com>
AuthorDate: Tue Jun 6 14:34:30 2017 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 6 14:34:30 2017 +0200

    x86/vlapic: fix two flaws in emulating MSR_IA32_APICBASE
   =20
    According to SDM Chapter ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (AP=
IC)
    -> Extended XAPIC (x2APIC) -> x2APIC State Transitions, The existing co=
de to
    handle guest's writing MSR_IA32_APICBASE has two flaws:
    1. Transition from x2APIC Mode to Disabled Mode is allowed but wrongly
    disabled currently. Fix it by removing the related check.
    2. Transition from x2APIC Mode to xAPIC Mode is illegal but wrongly all=
owed
    currently. Considering changing ENABLE bit of the MSR has been handled,
    it can be fixed by only allowing transition from xAPIC Mode to x2APIC M=
ode
    (the other two transitions: from x2APIC mode to xAPIC Mode, from disabl=
ed mode
    to invalid state (EN=3D0, EXTD=3D1) are disabled).
   =20
    Signed-off-by: Chao Gao <chao.gao@intel.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/hvm/vlapic.c        | 6 ++----
 xen/include/asm-x86/hvm/vlapic.h | 4 ++++
 2 files changed, 6 insertions(+), 4 deletions(-)

  * Generic APIC bitmap vector update & search routines.
--
generated by git-patchbot for /home/xen/git/xen.git#master
diff mbox

Patch

diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c
index cf8ee50..4320c6e 100644
--- a/xen/arch/x86/hvm/vlapic.c
+++ b/xen/arch/x86/hvm/vlapic.c
@@ -1003,14 +1003,12 @@  bool_t vlapic_msr_set(struct vlapic *vlapic, uint64=
_t value)
         }
         else
         {
-            if ( unlikely(vlapic_x2apic_mode(vlapic)) )
-                return 0;
             vlapic->hw.disabled |=3D VLAPIC_HW_DISABLED;
             pt_may_unmask_irq(vlapic_domain(vlapic), NULL);
         }
     }
-    else if ( !(value & MSR_IA32_APICBASE_ENABLE) &&
-              unlikely(value & MSR_IA32_APICBASE_EXTD) )
+    else if ( ((vlapic->hw.apic_base_msr ^ value) & MSR_IA32_APICBASE_EXTD=
) &&
+              unlikely(!vlapic_xapic_mode(vlapic)) )
         return 0;
=20
     vlapic->hw.apic_base_msr =3D value;
diff --git a/xen/include/asm-x86/hvm/vlapic.h b/xen/include/asm-x86/hvm/vla=
pic.h
index 4656293..a63fcd5 100644
--- a/xen/include/asm-x86/hvm/vlapic.h
+++ b/xen/include/asm-x86/hvm/vlapic.h
@@ -51,8 +51,12 @@ 
=20
 #define vlapic_base_address(vlapic)                             \
     ((vlapic)->hw.apic_base_msr & MSR_IA32_APICBASE_BASE)
+/* Only check EXTD bit as EXTD can't be set if it is disabled by hardware =
*/
 #define vlapic_x2apic_mode(vlapic)                              \
     ((vlapic)->hw.apic_base_msr & MSR_IA32_APICBASE_EXTD)
+#define vlapic_xapic_mode(vlapic)                               \
+    (!vlapic_hw_disabled(vlapic) && \
+     !((vlapic)->hw.apic_base_msr & MSR_IA32_APICBASE_EXTD))
=20
 /*