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[0/2] x86/iommu: support IOMMU for Zhaoxin CPU

Message ID 1554778767-3480-1-git-send-email-fionali-oc@zhaoxin.com (mailing list archive)
State New, archived
Headers show

Commit Message

FionaLi-oc April 9, 2019, 2:59 a.m. UTC
The patchset supports some features for Zhaoxin CPU whose vendor
ID is 'Shanghai'. Zhaoxin x86 SOC supports I/O virtualization
which is compatible with Intel I/O virtulizaiton.

Indent with four spaces.

Signed-off-by: FionaLi-oc <fionali-oc@zhaoxin.com>
---
 xen/include/asm-x86/iommu.h | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

Comments

Andrew Cooper April 9, 2019, 9:02 a.m. UTC | #1
On 09/04/2019 03:59, FionaLi-oc wrote:
> The patchset supports some features for Zhaoxin CPU whose vendor
> ID is 'Shanghai'. Zhaoxin x86 SOC supports I/O virtualization
> which is compatible with Intel I/O virtulizaiton.
>
> Indent with four spaces.
>
> Signed-off-by: FionaLi-oc <fionali-oc@zhaoxin.com>

Please would you test the staging branch of Xen.

Some very recent changes of Jan's for AMD x2apic support have included
http://xenbits.xen.org/gitweb/?p=xen.git;a=commitdiff;h=1b3cc8000c82edc9761c1e595928d6584e11f9f5
which drops this clause, and should initialise VT-d based on the
presence of the DMAR table, rather than the exact CPU vendor.

~Andrew
diff mbox

Patch

diff --git a/xen/include/asm-x86/iommu.h b/xen/include/asm-x86/iommu.h
index 8dc3924..ec5a009 100644
--- a/xen/include/asm-x86/iommu.h
+++ b/xen/include/asm-x86/iommu.h
@@ -71,10 +71,11 @@  static inline int iommu_hardware_setup(void)
 {
     switch ( boot_cpu_data.x86_vendor )
     {
-    case X86_VENDOR_INTEL:
-        return intel_vtd_setup();
-    case X86_VENDOR_AMD:
-        return amd_iov_detect();
+        case X86_VENDOR_INTEL:
+        case X86_VENDOR_SHANGHAI:
+            return intel_vtd_setup();
+        case X86_VENDOR_AMD:
+            return amd_iov_detect();
     }
 
     return -ENODEV;