Message ID | 1610361235-32697-1-git-send-email-olekstysh@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | iommu/arm: ipmmu-vmsa: Use 1U << 31 rather than 1 << 31 | expand |
On Mon, 11 Jan 2021, Oleksandr Tyshchenko wrote: > From: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> > > Replace all the use of 1 << 31 with 1U << 31 to prevent undefined > behavior in the IPMMU-VMSA driver. > > Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> > --- > This is a follow-up to > https://patchew.org/Xen/20201224152419.22453-1-julien@xen.org/ > --- > xen/drivers/passthrough/arm/ipmmu-vmsa.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/xen/drivers/passthrough/arm/ipmmu-vmsa.c b/xen/drivers/passthrough/arm/ipmmu-vmsa.c > index 346165c..aef358d 100644 > --- a/xen/drivers/passthrough/arm/ipmmu-vmsa.c > +++ b/xen/drivers/passthrough/arm/ipmmu-vmsa.c > @@ -187,7 +187,7 @@ static DEFINE_SPINLOCK(ipmmu_devices_lock); > #define IMCAAR 0x0004 > > #define IMTTBCR 0x0008 > -#define IMTTBCR_EAE (1 << 31) > +#define IMTTBCR_EAE (1U << 31) > #define IMTTBCR_PMB (1 << 30) > #define IMTTBCR_SH1_NON_SHAREABLE (0 << 28) > #define IMTTBCR_SH1_OUTER_SHAREABLE (2 << 28) > @@ -251,7 +251,7 @@ static DEFINE_SPINLOCK(ipmmu_devices_lock); > #define IMUCTR(n) ((n) < 32 ? IMUCTR0(n) : IMUCTR32(n)) > #define IMUCTR0(n) (0x0300 + ((n) * 16)) > #define IMUCTR32(n) (0x0600 + (((n) - 32) * 16)) > -#define IMUCTR_FIXADDEN (1 << 31) > +#define IMUCTR_FIXADDEN (1U << 31) > #define IMUCTR_FIXADD_MASK (0xff << 16) > #define IMUCTR_FIXADD_SHIFT 16 > #define IMUCTR_TTSEL_MMU(n) ((n) << 4) > -- > 2.7.4 >
> On 11 Jan 2021, at 10:33, Oleksandr Tyshchenko <olekstysh@gmail.com> wrote: > > From: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> > > Replace all the use of 1 << 31 with 1U << 31 to prevent undefined > behavior in the IPMMU-VMSA driver. > > Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com> Cheers Bertrand > --- > This is a follow-up to > https://patchew.org/Xen/20201224152419.22453-1-julien@xen.org/ > --- > xen/drivers/passthrough/arm/ipmmu-vmsa.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/xen/drivers/passthrough/arm/ipmmu-vmsa.c b/xen/drivers/passthrough/arm/ipmmu-vmsa.c > index 346165c..aef358d 100644 > --- a/xen/drivers/passthrough/arm/ipmmu-vmsa.c > +++ b/xen/drivers/passthrough/arm/ipmmu-vmsa.c > @@ -187,7 +187,7 @@ static DEFINE_SPINLOCK(ipmmu_devices_lock); > #define IMCAAR 0x0004 > > #define IMTTBCR 0x0008 > -#define IMTTBCR_EAE (1 << 31) > +#define IMTTBCR_EAE (1U << 31) > #define IMTTBCR_PMB (1 << 30) > #define IMTTBCR_SH1_NON_SHAREABLE (0 << 28) > #define IMTTBCR_SH1_OUTER_SHAREABLE (2 << 28) > @@ -251,7 +251,7 @@ static DEFINE_SPINLOCK(ipmmu_devices_lock); > #define IMUCTR(n) ((n) < 32 ? IMUCTR0(n) : IMUCTR32(n)) > #define IMUCTR0(n) (0x0300 + ((n) * 16)) > #define IMUCTR32(n) (0x0600 + (((n) - 32) * 16)) > -#define IMUCTR_FIXADDEN (1 << 31) > +#define IMUCTR_FIXADDEN (1U << 31) > #define IMUCTR_FIXADD_MASK (0xff << 16) > #define IMUCTR_FIXADD_SHIFT 16 > #define IMUCTR_TTSEL_MMU(n) ((n) << 4) > -- > 2.7.4 > >
diff --git a/xen/drivers/passthrough/arm/ipmmu-vmsa.c b/xen/drivers/passthrough/arm/ipmmu-vmsa.c index 346165c..aef358d 100644 --- a/xen/drivers/passthrough/arm/ipmmu-vmsa.c +++ b/xen/drivers/passthrough/arm/ipmmu-vmsa.c @@ -187,7 +187,7 @@ static DEFINE_SPINLOCK(ipmmu_devices_lock); #define IMCAAR 0x0004 #define IMTTBCR 0x0008 -#define IMTTBCR_EAE (1 << 31) +#define IMTTBCR_EAE (1U << 31) #define IMTTBCR_PMB (1 << 30) #define IMTTBCR_SH1_NON_SHAREABLE (0 << 28) #define IMTTBCR_SH1_OUTER_SHAREABLE (2 << 28) @@ -251,7 +251,7 @@ static DEFINE_SPINLOCK(ipmmu_devices_lock); #define IMUCTR(n) ((n) < 32 ? IMUCTR0(n) : IMUCTR32(n)) #define IMUCTR0(n) (0x0300 + ((n) * 16)) #define IMUCTR32(n) (0x0600 + (((n) - 32) * 16)) -#define IMUCTR_FIXADDEN (1 << 31) +#define IMUCTR_FIXADDEN (1U << 31) #define IMUCTR_FIXADD_MASK (0xff << 16) #define IMUCTR_FIXADD_SHIFT 16 #define IMUCTR_TTSEL_MMU(n) ((n) << 4)