diff mbox series

[v5,1/2] x86/vtx: add LBR_SELECT to the list of LBR MSRs

Message ID 1618481062-16094-1-git-send-email-igor.druzhinin@citrix.com (mailing list archive)
State New, archived
Headers show
Series [v5,1/2] x86/vtx: add LBR_SELECT to the list of LBR MSRs | expand

Commit Message

Igor Druzhinin April 15, 2021, 10:04 a.m. UTC
This MSR exists since Nehalem / Silvermont and is actively used by Linux,
for instance, to improve sampling efficiency.

Signed-off-by: Igor Druzhinin <igor.druzhinin@citrix.com>
---
Changes in v5:
- added Silvermont+ LBR_SELECT support

New patch in v4 as suggested by Andrew.
---
 xen/arch/x86/hvm/vmx/vmx.c      | 20 ++++++++++++++++----
 xen/include/asm-x86/msr-index.h | 10 ++++++++--
 2 files changed, 24 insertions(+), 6 deletions(-)

Comments

Jan Beulich April 15, 2021, 11:50 a.m. UTC | #1
On 15.04.2021 12:04, Igor Druzhinin wrote:
> This MSR exists since Nehalem / Silvermont and is actively used by Linux,
> for instance, to improve sampling efficiency.
> 
> Signed-off-by: Igor Druzhinin <igor.druzhinin@citrix.com>

Reviewed-by: Jan Beulich <jbeulich@suse.com>
Tian, Kevin April 25, 2021, 1:07 a.m. UTC | #2
> From: Igor Druzhinin <igor.druzhinin@citrix.com>
> Sent: Thursday, April 15, 2021 6:04 PM
> 
> This MSR exists since Nehalem / Silvermont and is actively used by Linux,
> for instance, to improve sampling efficiency.
> 
> Signed-off-by: Igor Druzhinin <igor.druzhinin@citrix.com>

Reviewed-by: Kevin Tian <kevin.tian@intel.com>

> ---
> Changes in v5:
> - added Silvermont+ LBR_SELECT support
> 
> New patch in v4 as suggested by Andrew.
> ---
>  xen/arch/x86/hvm/vmx/vmx.c      | 20 ++++++++++++++++----
>  xen/include/asm-x86/msr-index.h | 10 ++++++++--
>  2 files changed, 24 insertions(+), 6 deletions(-)
> 
> diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
> index 835b905..30c6a57 100644
> --- a/xen/arch/x86/hvm/vmx/vmx.c
> +++ b/xen/arch/x86/hvm/vmx/vmx.c
> @@ -2915,14 +2915,16 @@ static const struct lbr_info {
>  }, nh_lbr[] = {
>      { MSR_IA32_LASTINTFROMIP,       1 },
>      { MSR_IA32_LASTINTTOIP,         1 },
> -    { MSR_C2_LASTBRANCH_TOS,        1 },
> +    { MSR_NHL_LBR_SELECT,           1 },
> +    { MSR_NHL_LASTBRANCH_TOS,       1 },
>      { MSR_P4_LASTBRANCH_0_FROM_LIP,
> NUM_MSR_P4_LASTBRANCH_FROM_TO },
>      { MSR_P4_LASTBRANCH_0_TO_LIP,
> NUM_MSR_P4_LASTBRANCH_FROM_TO },
>      { 0, 0 }
>  }, sk_lbr[] = {
>      { MSR_IA32_LASTINTFROMIP,       1 },
>      { MSR_IA32_LASTINTTOIP,         1 },
> -    { MSR_SKL_LASTBRANCH_TOS,       1 },
> +    { MSR_NHL_LBR_SELECT,           1 },
> +    { MSR_NHL_LASTBRANCH_TOS,       1 },
>      { MSR_SKL_LASTBRANCH_0_FROM_IP, NUM_MSR_SKL_LASTBRANCH },
>      { MSR_SKL_LASTBRANCH_0_TO_IP,   NUM_MSR_SKL_LASTBRANCH },
>      { MSR_SKL_LASTBRANCH_0_INFO,    NUM_MSR_SKL_LASTBRANCH },
> @@ -2934,10 +2936,19 @@ static const struct lbr_info {
>      { MSR_C2_LASTBRANCH_0_FROM_IP,
> NUM_MSR_ATOM_LASTBRANCH_FROM_TO },
>      { MSR_C2_LASTBRANCH_0_TO_IP,
> NUM_MSR_ATOM_LASTBRANCH_FROM_TO },
>      { 0, 0 }
> +}, sm_lbr[] = {
> +    { MSR_IA32_LASTINTFROMIP,       1 },
> +    { MSR_IA32_LASTINTTOIP,         1 },
> +    { MSR_SM_LBR_SELECT,            1 },
> +    { MSR_SM_LASTBRANCH_TOS,        1 },
> +    { MSR_C2_LASTBRANCH_0_FROM_IP,
> NUM_MSR_ATOM_LASTBRANCH_FROM_TO },
> +    { MSR_C2_LASTBRANCH_0_TO_IP,
> NUM_MSR_ATOM_LASTBRANCH_FROM_TO },
> +    { 0, 0 }
>  }, gm_lbr[] = {
>      { MSR_IA32_LASTINTFROMIP,       1 },
>      { MSR_IA32_LASTINTTOIP,         1 },
> -    { MSR_GM_LASTBRANCH_TOS,        1 },
> +    { MSR_SM_LBR_SELECT,            1 },
> +    { MSR_SM_LASTBRANCH_TOS,        1 },
>      { MSR_GM_LASTBRANCH_0_FROM_IP,
> NUM_MSR_GM_LASTBRANCH_FROM_TO },
>      { MSR_GM_LASTBRANCH_0_TO_IP,
> NUM_MSR_GM_LASTBRANCH_FROM_TO },
>      { 0, 0 }
> @@ -2991,6 +3002,7 @@ static const struct lbr_info
> *last_branch_msr_get(void)
>              return sk_lbr;
>          /* Atom */
>          case 0x1c: case 0x26: case 0x27: case 0x35: case 0x36:
> +            return at_lbr;
>          /* Silvermont */
>          case 0x37: case 0x4a: case 0x4d: case 0x5a: case 0x5d:
>          /* Xeon Phi Knights Landing */
> @@ -2999,7 +3011,7 @@ static const struct lbr_info
> *last_branch_msr_get(void)
>          case 0x85:
>          /* Airmont */
>          case 0x4c:
> -            return at_lbr;
> +            return sm_lbr;
>          /* Goldmont */
>          case 0x5c: case 0x5f:
>              return gm_lbr;
> diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-
> index.h
> index 43d26ef..020908f 100644
> --- a/xen/include/asm-x86/msr-index.h
> +++ b/xen/include/asm-x86/msr-index.h
> @@ -606,15 +606,21 @@
>  #define NUM_MSR_C2_LASTBRANCH_FROM_TO	4
>  #define NUM_MSR_ATOM_LASTBRANCH_FROM_TO	8
> 
> +/* Nehalem (and newer) last-branch recording */
> +#define MSR_NHL_LBR_SELECT		0x000001c8
> +#define MSR_NHL_LASTBRANCH_TOS		0x000001c9
> +
>  /* Skylake (and newer) last-branch recording */
> -#define MSR_SKL_LASTBRANCH_TOS		0x000001c9
>  #define MSR_SKL_LASTBRANCH_0_FROM_IP	0x00000680
>  #define MSR_SKL_LASTBRANCH_0_TO_IP	0x000006c0
>  #define MSR_SKL_LASTBRANCH_0_INFO	0x00000dc0
>  #define NUM_MSR_SKL_LASTBRANCH		32
> 
> +/* Silvermont (and newer) last-branch recording */
> +#define MSR_SM_LBR_SELECT		0x000001c8
> +#define MSR_SM_LASTBRANCH_TOS		0x000001c9
> +
>  /* Goldmont last-branch recording */
> -#define MSR_GM_LASTBRANCH_TOS		0x000001c9
>  #define MSR_GM_LASTBRANCH_0_FROM_IP	0x00000680
>  #define MSR_GM_LASTBRANCH_0_TO_IP	0x000006c0
>  #define NUM_MSR_GM_LASTBRANCH_FROM_TO	32
> --
> 2.7.4
diff mbox series

Patch

diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index 835b905..30c6a57 100644
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -2915,14 +2915,16 @@  static const struct lbr_info {
 }, nh_lbr[] = {
     { MSR_IA32_LASTINTFROMIP,       1 },
     { MSR_IA32_LASTINTTOIP,         1 },
-    { MSR_C2_LASTBRANCH_TOS,        1 },
+    { MSR_NHL_LBR_SELECT,           1 },
+    { MSR_NHL_LASTBRANCH_TOS,       1 },
     { MSR_P4_LASTBRANCH_0_FROM_LIP, NUM_MSR_P4_LASTBRANCH_FROM_TO },
     { MSR_P4_LASTBRANCH_0_TO_LIP,   NUM_MSR_P4_LASTBRANCH_FROM_TO },
     { 0, 0 }
 }, sk_lbr[] = {
     { MSR_IA32_LASTINTFROMIP,       1 },
     { MSR_IA32_LASTINTTOIP,         1 },
-    { MSR_SKL_LASTBRANCH_TOS,       1 },
+    { MSR_NHL_LBR_SELECT,           1 },
+    { MSR_NHL_LASTBRANCH_TOS,       1 },
     { MSR_SKL_LASTBRANCH_0_FROM_IP, NUM_MSR_SKL_LASTBRANCH },
     { MSR_SKL_LASTBRANCH_0_TO_IP,   NUM_MSR_SKL_LASTBRANCH },
     { MSR_SKL_LASTBRANCH_0_INFO,    NUM_MSR_SKL_LASTBRANCH },
@@ -2934,10 +2936,19 @@  static const struct lbr_info {
     { MSR_C2_LASTBRANCH_0_FROM_IP,  NUM_MSR_ATOM_LASTBRANCH_FROM_TO },
     { MSR_C2_LASTBRANCH_0_TO_IP,    NUM_MSR_ATOM_LASTBRANCH_FROM_TO },
     { 0, 0 }
+}, sm_lbr[] = {
+    { MSR_IA32_LASTINTFROMIP,       1 },
+    { MSR_IA32_LASTINTTOIP,         1 },
+    { MSR_SM_LBR_SELECT,            1 },
+    { MSR_SM_LASTBRANCH_TOS,        1 },
+    { MSR_C2_LASTBRANCH_0_FROM_IP,  NUM_MSR_ATOM_LASTBRANCH_FROM_TO },
+    { MSR_C2_LASTBRANCH_0_TO_IP,    NUM_MSR_ATOM_LASTBRANCH_FROM_TO },
+    { 0, 0 }
 }, gm_lbr[] = {
     { MSR_IA32_LASTINTFROMIP,       1 },
     { MSR_IA32_LASTINTTOIP,         1 },
-    { MSR_GM_LASTBRANCH_TOS,        1 },
+    { MSR_SM_LBR_SELECT,            1 },
+    { MSR_SM_LASTBRANCH_TOS,        1 },
     { MSR_GM_LASTBRANCH_0_FROM_IP,  NUM_MSR_GM_LASTBRANCH_FROM_TO },
     { MSR_GM_LASTBRANCH_0_TO_IP,    NUM_MSR_GM_LASTBRANCH_FROM_TO },
     { 0, 0 }
@@ -2991,6 +3002,7 @@  static const struct lbr_info *last_branch_msr_get(void)
             return sk_lbr;
         /* Atom */
         case 0x1c: case 0x26: case 0x27: case 0x35: case 0x36:
+            return at_lbr;
         /* Silvermont */
         case 0x37: case 0x4a: case 0x4d: case 0x5a: case 0x5d:
         /* Xeon Phi Knights Landing */
@@ -2999,7 +3011,7 @@  static const struct lbr_info *last_branch_msr_get(void)
         case 0x85:
         /* Airmont */
         case 0x4c:
-            return at_lbr;
+            return sm_lbr;
         /* Goldmont */
         case 0x5c: case 0x5f:
             return gm_lbr;
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 43d26ef..020908f 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -606,15 +606,21 @@ 
 #define NUM_MSR_C2_LASTBRANCH_FROM_TO	4
 #define NUM_MSR_ATOM_LASTBRANCH_FROM_TO	8
 
+/* Nehalem (and newer) last-branch recording */
+#define MSR_NHL_LBR_SELECT		0x000001c8
+#define MSR_NHL_LASTBRANCH_TOS		0x000001c9
+
 /* Skylake (and newer) last-branch recording */
-#define MSR_SKL_LASTBRANCH_TOS		0x000001c9
 #define MSR_SKL_LASTBRANCH_0_FROM_IP	0x00000680
 #define MSR_SKL_LASTBRANCH_0_TO_IP	0x000006c0
 #define MSR_SKL_LASTBRANCH_0_INFO	0x00000dc0
 #define NUM_MSR_SKL_LASTBRANCH		32
 
+/* Silvermont (and newer) last-branch recording */
+#define MSR_SM_LBR_SELECT		0x000001c8
+#define MSR_SM_LASTBRANCH_TOS		0x000001c9
+
 /* Goldmont last-branch recording */
-#define MSR_GM_LASTBRANCH_TOS		0x000001c9
 #define MSR_GM_LASTBRANCH_0_FROM_IP	0x00000680
 #define MSR_GM_LASTBRANCH_0_TO_IP	0x000006c0
 #define NUM_MSR_GM_LASTBRANCH_FROM_TO	32