| Message ID | 20160928182457.12433-11-andre.przywara@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, 28 Sep 2016, Andre Przywara wrote: > Now that the host part of the ITS code is in place, we can enable the > ITS and also LPIs on each redistributor to get the show rolling. > At this point there would be no LPIs mapped, as guests don't know about > the ITS yet. > > Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> > xen/arch/arm/gic-its.c | 4 ++++ > xen/arch/arm/gic-v3.c | 19 +++++++++++++++++++ > 2 files changed, 23 insertions(+) > > diff --git a/xen/arch/arm/gic-its.c b/xen/arch/arm/gic-its.c > index b7aa918..6bac422 100644 > --- a/xen/arch/arm/gic-its.c > +++ b/xen/arch/arm/gic-its.c > @@ -449,6 +449,10 @@ int gicv3_its_init(struct host_its *hw_its) > its_send_cmd_mapc(hw_its, smp_processor_id(), smp_processor_id()); > its_send_cmd_sync(hw_its, smp_processor_id()); > > + /* Now enable interrupt translation on that ITS. */ > + reg = readl_relaxed(hw_its->its_base + GITS_CTLR); > + writel_relaxed(reg | GITS_CTLR_ENABLE, hw_its->its_base + GITS_CTLR); > + > return 0; > } > > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > index b9387a3..57009c6 100644 > --- a/xen/arch/arm/gic-v3.c > +++ b/xen/arch/arm/gic-v3.c > @@ -642,6 +642,21 @@ static void gicv3_rdist_init_lpis(void __iomem * rdist_base) > gicv3_its_setup_collection(smp_processor_id()); > } > > +/* Enable LPIs on this redistributor (only useful when the host has an ITS. */ > +static bool gicv3_enable_lpis(void) > +{ > + uint32_t val; > + > + val = readl_relaxed(GICD_RDIST_BASE + GICR_TYPER); > + if ( !(val & GICR_TYPER_PLPIS) ) > + return false; > + > + val = readl_relaxed(GICD_RDIST_BASE + GICR_CTLR); > + writel_relaxed(val | GICR_CTLR_ENABLE_LPIS, GICD_RDIST_BASE + GICR_CTLR); > + > + return true; > +} > + > static int __init gicv3_populate_rdist(void) > { > int i; > @@ -741,6 +756,10 @@ static int gicv3_cpu_init(void) > if ( gicv3_enable_redist() ) > return -ENODEV; > > + /* If the host has any ITSes, enable LPIs now. */ > + if ( !list_empty(&host_its_list) ) > + gicv3_enable_lpis(); > + > /* Set priority on PPI and SGI interrupts */ > priority = (GIC_PRI_IPI << 24 | GIC_PRI_IPI << 16 | GIC_PRI_IPI << 8 | > GIC_PRI_IPI); > -- > 2.9.0 >
diff --git a/xen/arch/arm/gic-its.c b/xen/arch/arm/gic-its.c index b7aa918..6bac422 100644 --- a/xen/arch/arm/gic-its.c +++ b/xen/arch/arm/gic-its.c @@ -449,6 +449,10 @@ int gicv3_its_init(struct host_its *hw_its) its_send_cmd_mapc(hw_its, smp_processor_id(), smp_processor_id()); its_send_cmd_sync(hw_its, smp_processor_id()); + /* Now enable interrupt translation on that ITS. */ + reg = readl_relaxed(hw_its->its_base + GITS_CTLR); + writel_relaxed(reg | GITS_CTLR_ENABLE, hw_its->its_base + GITS_CTLR); + return 0; } diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index b9387a3..57009c6 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -642,6 +642,21 @@ static void gicv3_rdist_init_lpis(void __iomem * rdist_base) gicv3_its_setup_collection(smp_processor_id()); } +/* Enable LPIs on this redistributor (only useful when the host has an ITS. */ +static bool gicv3_enable_lpis(void) +{ + uint32_t val; + + val = readl_relaxed(GICD_RDIST_BASE + GICR_TYPER); + if ( !(val & GICR_TYPER_PLPIS) ) + return false; + + val = readl_relaxed(GICD_RDIST_BASE + GICR_CTLR); + writel_relaxed(val | GICR_CTLR_ENABLE_LPIS, GICD_RDIST_BASE + GICR_CTLR); + + return true; +} + static int __init gicv3_populate_rdist(void) { int i; @@ -741,6 +756,10 @@ static int gicv3_cpu_init(void) if ( gicv3_enable_redist() ) return -ENODEV; + /* If the host has any ITSes, enable LPIs now. */ + if ( !list_empty(&host_its_list) ) + gicv3_enable_lpis(); + /* Set priority on PPI and SGI interrupts */ priority = (GIC_PRI_IPI << 24 | GIC_PRI_IPI << 16 | GIC_PRI_IPI << 8 | GIC_PRI_IPI);
Now that the host part of the ITS code is in place, we can enable the ITS and also LPIs on each redistributor to get the show rolling. At this point there would be no LPIs mapped, as guests don't know about the ITS yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- xen/arch/arm/gic-its.c | 4 ++++ xen/arch/arm/gic-v3.c | 19 +++++++++++++++++++ 2 files changed, 23 insertions(+)