Message ID | 20160928182457.12433-21-andre.przywara@arm.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Wed, 28 Sep 2016, Andre Przywara wrote: > The INV command instructs the ITS to update the configuration data for > a given LPI by re-reading its entry from the property table. > We don't need to care so much about the priority value, but enabling > or disabling an LPI has some effect: We remove or push virtual LPIs > to their VCPUs, also propagate the enable bit to the hardware. > > Signed-off-by: Andre Przywara <andre.przywara@arm.com> > --- > xen/arch/arm/gic-its.c | 35 ++++++++++++++++++++ > xen/arch/arm/vgic-its.c | 74 +++++++++++++++++++++++++++++++++++++++++++ > xen/include/asm-arm/gic-its.h | 3 ++ > 3 files changed, 112 insertions(+) > > diff --git a/xen/arch/arm/gic-its.c b/xen/arch/arm/gic-its.c > index 766a7cb..6f4329f 100644 > --- a/xen/arch/arm/gic-its.c > +++ b/xen/arch/arm/gic-its.c > @@ -215,6 +215,19 @@ static int its_send_cmd_mapd(struct host_its *its, uint32_t deviceid, > return its_send_command(its, cmd); > } > > +static int its_send_cmd_inv(struct host_its *its, > + uint32_t deviceid, uint32_t eventid) > +{ > + uint64_t cmd[4]; > + > + cmd[0] = GITS_CMD_INV | ((uint64_t)deviceid << 32); > + cmd[1] = eventid; > + cmd[2] = 0x00; > + cmd[3] = 0x00; > + > + return its_send_command(its, cmd); > +} > + > int gicv3_its_map_device(struct host_its *hw_its, struct domain *d, > int devid, int bits, bool valid) > { > @@ -655,6 +668,28 @@ uint32_t gicv3_lpi_lookup_lpi(struct domain *d, uint32_t host_lpi, int *vcpu_id) > return hlpi.virt_lpi; > } > > +void gicv3_lpi_set_enable(struct host_its *its, > + uint32_t deviceid, uint32_t eventid, > + uint32_t host_lpi, bool enabled) > +{ > + host_lpi -= 8192; > + > + if ( host_lpi >= MAX_HOST_LPIS ) > + return; > + > + if ( !its ) > + return; > + > + if (enabled) > + lpi_data.lpi_property[host_lpi] |= LPI_PROP_ENABLED; > + else > + lpi_data.lpi_property[host_lpi] &= ~LPI_PROP_ENABLED; > + > + __flush_dcache_area(&lpi_data.lpi_property[host_lpi], 1); > + > + its_send_cmd_inv(its, deviceid, eventid); > + its_send_cmd_sync(its, 0); > +} > + > void gicv3_its_dt_init(const struct dt_device_node *node) > { > const struct dt_device_node *its = NULL; > diff --git a/xen/arch/arm/vgic-its.c b/xen/arch/arm/vgic-its.c > index 028d234..74da8fc 100644 > --- a/xen/arch/arm/vgic-its.c > +++ b/xen/arch/arm/vgic-its.c > @@ -223,6 +223,77 @@ out_unlock: > return ret; > } > > +/* For a given virtual LPI read the enabled bit from the virtual property > + * table and update the virtual IRQ's state. > + * This enables or disables the associated hardware LPI, also takes care > + * of removing or pushing of virtual LPIs to their VCPUs. > + */ > +static void update_lpi_enabled_status(struct virt_its* its, > + struct vcpu *vcpu, uint32_t vlpi, > + uint32_t deviceid, uint32_t eventid, > + uint32_t hlpi) > +{ > + struct pending_irq *pirq = lpi_to_pending(vcpu, vlpi, false); > + uint8_t property = its->d->arch.vgic.proptable[vlpi - 8192]; We need to check vlpi before using to access an array. We also need a barrier before using property. > + if ( property & LPI_PROP_ENABLED ) > + { > + if ( pirq ) > + { > + unsigned long flags; > + > + set_bit(GIC_IRQ_GUEST_ENABLED, &pirq->status); > + spin_lock_irqsave(&vcpu->arch.vgic.lock, flags); > + if ( !list_empty(&pirq->inflight) && > + !test_bit(GIC_IRQ_GUEST_VISIBLE, &pirq->status) ) > + gic_raise_guest_irq(vcpu, vlpi, property & 0xfc); > + spin_unlock_irqrestore(&vcpu->arch.vgic.lock, flags); > + > + } > + gicv3_lpi_set_enable(its->hw_its, deviceid, eventid, hlpi, true); > + } > + else > + { > + if ( pirq ) > + { > + clear_bit(GIC_IRQ_GUEST_ENABLED, &pirq->status); > + gic_remove_from_queues(vcpu, vlpi); > + } > + gicv3_lpi_set_enable(its->hw_its, deviceid, eventid, hlpi, false); > + } > +} > + > +static int its_handle_inv(struct virt_its *its, uint64_t *cmdptr) > +{ > + uint32_t devid = its_cmd_get_deviceid(cmdptr); > + uint32_t eventid = its_cmd_get_id(cmdptr); > + struct vits_itte *itte; > + struct vcpu *vcpu; > + uint32_t hlpi, vlpi; > + int ret = -1; > + > + spin_lock(&its->its_lock); > + > + itte = get_devid_evid(its, devid, eventid); > + if ( !itte ) > + goto out_unlock; We need to check itte->collection before using it to access d->vcpu. > + vcpu = its->d->vcpu[itte->collection]; > + vlpi = itte->vlpi; > + hlpi = itte->hlpi; > + > + ret = 0; > + > + put_devid_evid(its, itte); > + > +out_unlock: > + spin_unlock(&its->its_lock); > + > + if ( !ret ) > + update_lpi_enabled_status(its, vcpu, vlpi, devid, eventid, hlpi); > + > + return ret; > +} > + > static int its_handle_mapc(struct virt_its *its, uint64_t *cmdptr) > { > uint32_t collid = its_cmd_get_collection(cmdptr); > @@ -441,6 +512,9 @@ static int vgic_its_handle_cmds(struct domain *d, struct virt_its *its, > case GITS_CMD_INT: > its_handle_int(its, cmdptr); > break; > + case GITS_CMD_INV: > + its_handle_inv(its, cmdptr); > + break; > case GITS_CMD_MAPC: > its_handle_mapc(its, cmdptr); > break; > diff --git a/xen/include/asm-arm/gic-its.h b/xen/include/asm-arm/gic-its.h > index 3f5698d..2cdb3e1 100644 > --- a/xen/include/asm-arm/gic-its.h > +++ b/xen/include/asm-arm/gic-its.h > @@ -139,6 +139,9 @@ int gicv3_lpi_allocate_host_lpi(struct host_its *its, > uint32_t gicv3_lpi_lookup_lpi(struct domain *d, uint32_t host_lpi, > int *vcpu_id); > int gicv3_lpi_change_vcpu(struct domain *d, uint32_t host_lpi, int new_vcpu_id); > +void gicv3_lpi_set_enable(struct host_its *its, > + uint32_t deviceid, uint32_t eventid, > + uint32_t host_lpi, bool enabled); > int gicv3_lpi_drop_host_lpi(struct host_its *its, > uint32_t devid, uint32_t eventid, > uint32_t host_lpi);
diff --git a/xen/arch/arm/gic-its.c b/xen/arch/arm/gic-its.c index 766a7cb..6f4329f 100644 --- a/xen/arch/arm/gic-its.c +++ b/xen/arch/arm/gic-its.c @@ -215,6 +215,19 @@ static int its_send_cmd_mapd(struct host_its *its, uint32_t deviceid, return its_send_command(its, cmd); } +static int its_send_cmd_inv(struct host_its *its, + uint32_t deviceid, uint32_t eventid) +{ + uint64_t cmd[4]; + + cmd[0] = GITS_CMD_INV | ((uint64_t)deviceid << 32); + cmd[1] = eventid; + cmd[2] = 0x00; + cmd[3] = 0x00; + + return its_send_command(its, cmd); +} + int gicv3_its_map_device(struct host_its *hw_its, struct domain *d, int devid, int bits, bool valid) { @@ -655,6 +668,28 @@ uint32_t gicv3_lpi_lookup_lpi(struct domain *d, uint32_t host_lpi, int *vcpu_id) return hlpi.virt_lpi; } +void gicv3_lpi_set_enable(struct host_its *its, + uint32_t deviceid, uint32_t eventid, + uint32_t host_lpi, bool enabled) +{ + host_lpi -= 8192; + + if ( host_lpi >= MAX_HOST_LPIS ) + return; + + if ( !its ) + return; + + if (enabled) + lpi_data.lpi_property[host_lpi] |= LPI_PROP_ENABLED; + else + lpi_data.lpi_property[host_lpi] &= ~LPI_PROP_ENABLED; + + __flush_dcache_area(&lpi_data.lpi_property[host_lpi], 1); + its_send_cmd_inv(its, deviceid, eventid); + its_send_cmd_sync(its, 0); +} + void gicv3_its_dt_init(const struct dt_device_node *node) { const struct dt_device_node *its = NULL; diff --git a/xen/arch/arm/vgic-its.c b/xen/arch/arm/vgic-its.c index 028d234..74da8fc 100644 --- a/xen/arch/arm/vgic-its.c +++ b/xen/arch/arm/vgic-its.c @@ -223,6 +223,77 @@ out_unlock: return ret; } +/* For a given virtual LPI read the enabled bit from the virtual property + * table and update the virtual IRQ's state. + * This enables or disables the associated hardware LPI, also takes care + * of removing or pushing of virtual LPIs to their VCPUs. + */ +static void update_lpi_enabled_status(struct virt_its* its, + struct vcpu *vcpu, uint32_t vlpi, + uint32_t deviceid, uint32_t eventid, + uint32_t hlpi) +{ + struct pending_irq *pirq = lpi_to_pending(vcpu, vlpi, false); + uint8_t property = its->d->arch.vgic.proptable[vlpi - 8192]; + + if ( property & LPI_PROP_ENABLED ) + { + if ( pirq ) + { + unsigned long flags; + + set_bit(GIC_IRQ_GUEST_ENABLED, &pirq->status); + spin_lock_irqsave(&vcpu->arch.vgic.lock, flags); + if ( !list_empty(&pirq->inflight) && + !test_bit(GIC_IRQ_GUEST_VISIBLE, &pirq->status) ) + gic_raise_guest_irq(vcpu, vlpi, property & 0xfc); + spin_unlock_irqrestore(&vcpu->arch.vgic.lock, flags); + } + gicv3_lpi_set_enable(its->hw_its, deviceid, eventid, hlpi, true); + } + else + { + if ( pirq ) + { + clear_bit(GIC_IRQ_GUEST_ENABLED, &pirq->status); + gic_remove_from_queues(vcpu, vlpi); + } + gicv3_lpi_set_enable(its->hw_its, deviceid, eventid, hlpi, false); + } +} + +static int its_handle_inv(struct virt_its *its, uint64_t *cmdptr) +{ + uint32_t devid = its_cmd_get_deviceid(cmdptr); + uint32_t eventid = its_cmd_get_id(cmdptr); + struct vits_itte *itte; + struct vcpu *vcpu; + uint32_t hlpi, vlpi; + int ret = -1; + + spin_lock(&its->its_lock); + + itte = get_devid_evid(its, devid, eventid); + if ( !itte ) + goto out_unlock; + + vcpu = its->d->vcpu[itte->collection]; + vlpi = itte->vlpi; + hlpi = itte->hlpi; + + ret = 0; + + put_devid_evid(its, itte); + +out_unlock: + spin_unlock(&its->its_lock); + + if ( !ret ) + update_lpi_enabled_status(its, vcpu, vlpi, devid, eventid, hlpi); + + return ret; +} + static int its_handle_mapc(struct virt_its *its, uint64_t *cmdptr) { uint32_t collid = its_cmd_get_collection(cmdptr); @@ -441,6 +512,9 @@ static int vgic_its_handle_cmds(struct domain *d, struct virt_its *its, case GITS_CMD_INT: its_handle_int(its, cmdptr); break; + case GITS_CMD_INV: + its_handle_inv(its, cmdptr); + break; case GITS_CMD_MAPC: its_handle_mapc(its, cmdptr); break; diff --git a/xen/include/asm-arm/gic-its.h b/xen/include/asm-arm/gic-its.h index 3f5698d..2cdb3e1 100644 --- a/xen/include/asm-arm/gic-its.h +++ b/xen/include/asm-arm/gic-its.h @@ -139,6 +139,9 @@ int gicv3_lpi_allocate_host_lpi(struct host_its *its, uint32_t gicv3_lpi_lookup_lpi(struct domain *d, uint32_t host_lpi, int *vcpu_id); int gicv3_lpi_change_vcpu(struct domain *d, uint32_t host_lpi, int new_vcpu_id); +void gicv3_lpi_set_enable(struct host_its *its, + uint32_t deviceid, uint32_t eventid, + uint32_t host_lpi, bool enabled); int gicv3_lpi_drop_host_lpi(struct host_its *its, uint32_t devid, uint32_t eventid, uint32_t host_lpi);
The INV command instructs the ITS to update the configuration data for a given LPI by re-reading its entry from the property table. We don't need to care so much about the priority value, but enabling or disabling an LPI has some effect: We remove or push virtual LPIs to their VCPUs, also propagate the enable bit to the hardware. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- xen/arch/arm/gic-its.c | 35 ++++++++++++++++++++ xen/arch/arm/vgic-its.c | 74 +++++++++++++++++++++++++++++++++++++++++++ xen/include/asm-arm/gic-its.h | 3 ++ 3 files changed, 112 insertions(+)