From patchwork Fri Feb 17 06:39:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haozhong Zhang X-Patchwork-Id: 9578863 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C2AA3600C5 for ; Fri, 17 Feb 2017 06:43:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B36052869B for ; Fri, 17 Feb 2017 06:43:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A8293286A4; Fri, 17 Feb 2017 06:43:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2DE272869B for ; Fri, 17 Feb 2017 06:43:07 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cecEC-0002rd-4k; Fri, 17 Feb 2017 06:41:12 +0000 Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cecEA-0002pS-Mz for xen-devel@lists.xen.org; Fri, 17 Feb 2017 06:41:10 +0000 Received: from [193.109.254.147] by server-7.bemta-6.messagelabs.com id EC/0E-26824-60B96A85; Fri, 17 Feb 2017 06:41:10 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrFLMWRWlGSWpSXmKPExsVywNykWJd19rI Ig58n+S2WfFzM4sDocXT3b6YAxijWzLyk/IoE1oz9SxuZCs4aVTxfc5W5gfGuehcjF4eQwDRG iSk7nrJ0MXJySAjwShxZNoMVwvaT6OpoZ4Uo6mWU6Jq/DqyITUBfYsXjg2BFIgLSEtc+X2YEK WIWmM4kcW/tAqAEB4ewQJzEivnJIDUsAqoSC7Z2MoPYvAJ2EsvuHWWEWCAvceHqKbCZnEDxPw 8/sIPYQgK2Eu8/3WOewMi7gJFhFaN6cWpRWWqRroleUlFmekZJbmJmjq6hgZlebmpxcWJ6ak5 iUrFecn7uJkZgODAAwQ7G7sv+hxglOZiURHkXTVsWIcSXlJ9SmZFYnBFfVJqTWnyIUYaDQ0mC l3sWUE6wKDU9tSItMwcYmDBpCQ4eJRFeDpA0b3FBYm5xZjpE6hSjLsepG6dfMgmx5OXnpUqJ8 96YCVQkAFKUUZoHNwIWJZcYZaWEeRmBjhLiKUgtys0sQZV/xSjOwagkzHsBZApPZl4J3KZXQE cwAR3RGbEU5IiSRISUVAPjJKnzcyT/MpQsfMLrGOY4s7DJXtr2R6z4xvQbJz+8SLl0T1JiUsy +L0x3Pbz9lfbuKJS4al/IwCG0rNOJL86rsu5C1/F+920PPL7cqdgXJPLs4ZyQ1xnarx5dUWB4 6K6vMDPU5pN0Q/JNd52sH9KHT4rPletg18tfeV1sSuIGvkX1Sfu9BGcosRRnJBpqMRcVJwIAh vOm+o0CAAA= X-Env-Sender: haozhong.zhang@intel.com X-Msg-Ref: server-15.tower-27.messagelabs.com!1487313633!34675007!17 X-Originating-IP: [192.55.52.115] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 9.2.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 34126 invoked from network); 17 Feb 2017 06:41:08 -0000 Received: from mga14.intel.com (HELO mga14.intel.com) (192.55.52.115) by server-15.tower-27.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 17 Feb 2017 06:41:08 -0000 Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Feb 2017 22:41:08 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,171,1484035200"; d="scan'208";a="65781625" Received: from hz-desktop.sh.intel.com (HELO localhost) ([10.239.159.133]) by orsmga005.jf.intel.com with ESMTP; 16 Feb 2017 22:41:06 -0800 From: Haozhong Zhang To: xen-devel@lists.xen.org Date: Fri, 17 Feb 2017 14:39:34 +0800 Message-Id: <20170217063936.13208-18-haozhong.zhang@intel.com> X-Mailer: git-send-email 2.10.1 In-Reply-To: <20170217063936.13208-1-haozhong.zhang@intel.com> References: <20170217063936.13208-1-haozhong.zhang@intel.com> Cc: Haozhong Zhang , Wei Liu , Liu Jinsong , Christoph Egger , Ian Jackson , Jan Beulich , Andrew Cooper Subject: [Xen-devel] [PATCH 17/19] x86/vmce, tools/libxl: expose LMCE capability in guest MSR_IA32_MCG_CAP X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP If LMCE is supported by host and "lmce = 1" is present in xl config, the LMCE capability will be exposed in guest MSR_IA32_MCG_CAP. By default, LMCE is not exposed to guest so as to keep the backwards migration compatibility. Signed-off-by: Haozhong Zhang --- Cc: Ian Jackson Cc: Wei Liu Cc: Christoph Egger Cc: Liu Jinsong Cc: Jan Beulich Cc: Andrew Cooper --- docs/man/xl.cfg.pod.5.in | 18 ++++++++++++++++++ tools/libxl/libxl_create.c | 1 + tools/libxl/libxl_dom.c | 2 ++ tools/libxl/libxl_types.idl | 1 + tools/libxl/xl_cmdimpl.c | 3 +++ xen/arch/x86/cpu/mcheck/vmce.c | 14 +++++++++++++- xen/arch/x86/hvm/hvm.c | 7 +++++++ xen/include/asm-x86/mce.h | 1 + xen/include/public/hvm/params.h | 5 ++++- 9 files changed, 50 insertions(+), 2 deletions(-) diff --git a/docs/man/xl.cfg.pod.5.in b/docs/man/xl.cfg.pod.5.in index 46f9caf..1cdf372 100644 --- a/docs/man/xl.cfg.pod.5.in +++ b/docs/man/xl.cfg.pod.5.in @@ -2021,6 +2021,24 @@ natively or via hardware backwards compatibility support. =back +=head3 Intel + +=over 4 + +=item B + +(HVM only) Enable/disable LMCE support for a HVM domain. + +=over 4 + +=item B + +Disabled. + +=back + +=back + =head1 SEE ALSO =over 4 diff --git a/tools/libxl/libxl_create.c b/tools/libxl/libxl_create.c index e3bc257..381e5dc 100644 --- a/tools/libxl/libxl_create.c +++ b/tools/libxl/libxl_create.c @@ -324,6 +324,7 @@ int libxl__domain_build_info_setdefault(libxl__gc *gc, libxl_defbool_setdefault(&b_info->u.hvm.altp2m, false); libxl_defbool_setdefault(&b_info->u.hvm.usb, false); libxl_defbool_setdefault(&b_info->u.hvm.xen_platform_pci, true); + libxl_defbool_setdefault(&b_info->u.hvm.lmce, false); libxl_defbool_setdefault(&b_info->u.hvm.spice.enable, false); if (!libxl_defbool_val(b_info->u.hvm.spice.enable) && diff --git a/tools/libxl/libxl_dom.c b/tools/libxl/libxl_dom.c index d519c8d..f04adf4 100644 --- a/tools/libxl/libxl_dom.c +++ b/tools/libxl/libxl_dom.c @@ -293,6 +293,8 @@ static void hvm_set_conf_params(xc_interface *handle, uint32_t domid, libxl_defbool_val(info->u.hvm.nested_hvm)); xc_hvm_param_set(handle, domid, HVM_PARAM_ALTP2M, libxl_defbool_val(info->u.hvm.altp2m)); + xc_hvm_param_set(handle, domid, HVM_PARAM_LMCE, + libxl_defbool_val(info->u.hvm.lmce)); } int libxl__build_pre(libxl__gc *gc, uint32_t domid, diff --git a/tools/libxl/libxl_types.idl b/tools/libxl/libxl_types.idl index a612d1f..3cb0d9a 100644 --- a/tools/libxl/libxl_types.idl +++ b/tools/libxl/libxl_types.idl @@ -550,6 +550,7 @@ libxl_domain_build_info = Struct("domain_build_info",[ ("serial_list", libxl_string_list), ("rdm", libxl_rdm_reserve), ("rdm_mem_boundary_memkb", MemKB), + ("lmce", libxl_defbool), ])), ("pv", Struct(None, [("kernel", string), ("slack_memkb", MemKB), diff --git a/tools/libxl/xl_cmdimpl.c b/tools/libxl/xl_cmdimpl.c index 37ebdce..4ed8e3e 100644 --- a/tools/libxl/xl_cmdimpl.c +++ b/tools/libxl/xl_cmdimpl.c @@ -1698,6 +1698,9 @@ static void parse_config_data(const char *config_source, if (!xlu_cfg_get_long (config, "rdm_mem_boundary", &l, 0)) b_info->u.hvm.rdm_mem_boundary_memkb = l * 1024; + + xlu_cfg_get_defbool(config, "lmce", &b_info->u.hvm.lmce, 0); + break; case LIBXL_DOMAIN_TYPE_PV: { diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c index 2a4d3f0..fa9b499 100644 --- a/xen/arch/x86/cpu/mcheck/vmce.c +++ b/xen/arch/x86/cpu/mcheck/vmce.c @@ -74,7 +74,7 @@ int vmce_restore_vcpu(struct vcpu *v, const struct hvm_vmce_vcpu *ctxt) unsigned long guest_mcg_cap; if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) - guest_mcg_cap = INTEL_GUEST_MCG_CAP; + guest_mcg_cap = INTEL_GUEST_MCG_CAP | (lmce_support ? MCG_LMCE_P : 0); else guest_mcg_cap = AMD_GUEST_MCG_CAP; @@ -519,3 +519,15 @@ int unmmap_broken_page(struct domain *d, mfn_t mfn, unsigned long gfn) return rc; } +int vmce_enable_lmce(struct domain *d) +{ + struct vcpu *v; + + if ( !lmce_support ) + return -EINVAL; + + for_each_vcpu(d, v) + v->arch.vmce.mcg_cap |= MCG_LMCE_P; + + return 0; +} diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 266f708..19389c0 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -4007,6 +4007,7 @@ static int hvm_allow_set_param(struct domain *d, case HVM_PARAM_IOREQ_SERVER_PFN: case HVM_PARAM_NR_IOREQ_SERVER_PAGES: case HVM_PARAM_ALTP2M: + case HVM_PARAM_LMCE: if ( value != 0 && a->value != value ) rc = -EEXIST; break; @@ -4185,6 +4186,12 @@ static int hvmop_set_param( } d->arch.x87_fip_width = a.value; break; + case HVM_PARAM_LMCE: + if ( a.value > 1 ) + rc = -EINVAL; + else if ( a.value == 1 ) + rc = vmce_enable_lmce(d); + break; } if ( rc != 0 ) diff --git a/xen/include/asm-x86/mce.h b/xen/include/asm-x86/mce.h index 525a9e8..f5a9ff9 100644 --- a/xen/include/asm-x86/mce.h +++ b/xen/include/asm-x86/mce.h @@ -38,6 +38,7 @@ extern int vmce_restore_vcpu(struct vcpu *, const struct hvm_vmce_vcpu *); extern int vmce_wrmsr(uint32_t msr, uint64_t val); extern int vmce_rdmsr(uint32_t msr, uint64_t *val); extern bool vmce_support_lmce(const struct vcpu *v); +extern int vmce_enable_lmce(struct domain *d); extern unsigned int nr_mce_banks; diff --git a/xen/include/public/hvm/params.h b/xen/include/public/hvm/params.h index 3f54a49..6b6ecbe 100644 --- a/xen/include/public/hvm/params.h +++ b/xen/include/public/hvm/params.h @@ -253,6 +253,9 @@ */ #define HVM_PARAM_X87_FIP_WIDTH 36 -#define HVM_NR_PARAMS 37 +/* Boolean: Enable LMCE */ +#define HVM_PARAM_LMCE 37 + +#define HVM_NR_PARAMS 38 #endif /* __XEN_PUBLIC_HVM_PARAMS_H__ */