@@ -2274,8 +2274,6 @@ static int ioapic_physbase_to_id(unsigned long physbase)
return -EINVAL;
}
-unsigned apic_gsi_base(int apic);
-
static int apic_pin_2_gsi_irq(int apic, int pin)
{
int idx;
@@ -2286,7 +2284,7 @@ static int apic_pin_2_gsi_irq(int apic, int pin)
idx = find_irq_entry(apic, pin, mp_INT);
return idx >= 0 ? pin_2_irq(idx, apic, pin)
- : apic_gsi_base(apic) + pin;
+ : io_apic_gsi_base(apic) + pin;
}
int ioapic_guest_read(unsigned long physbase, unsigned int reg, u32 *pval)
@@ -913,7 +913,7 @@ unsigned __init highest_gsi(void)
return res;
}
-unsigned apic_gsi_base(int apic)
+unsigned int io_apic_gsi_base(unsigned int apic)
{
return mp_ioapic_routing[apic].gsi_base;
}
@@ -127,6 +127,9 @@ struct __packed IO_APIC_route_entry {
/* I/O APIC entries */
extern struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS];
+/* Base GSI for this IO APIC */
+unsigned int io_apic_gsi_base(unsigned int apic);
+
/* Only need to remap ioapic RTE (reg: 10~3Fh) */
#define ioapic_reg_remapped(reg) (iommu_intremap && ((reg) >= 0x10))