From patchwork Fri Mar 31 18:05:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 9657093 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7AA8960350 for ; Fri, 31 Mar 2017 18:05:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6F4D8286B7 for ; Fri, 31 Mar 2017 18:05:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6432A286F1; Fri, 31 Mar 2017 18:05:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id AED80286EF for ; Fri, 31 Mar 2017 18:05:53 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cu0tz-0005vl-SC; Fri, 31 Mar 2017 18:03:59 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cu0ty-0005sR-La for xen-devel@lists.xenproject.org; Fri, 31 Mar 2017 18:03:58 +0000 Received: from [85.158.137.68] by server-17.bemta-3.messagelabs.com id A0/FE-04270-E0A9ED85; Fri, 31 Mar 2017 18:03:58 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrGLMWRWlGSWpSXmKPExsVysyfVTZd31r0 Ig1OLVCy+b5nM5MDocfjDFZYAxijWzLyk/IoE1oxrva3MBV8lKl6vW8vSwLhJuIuRi0NIYBOj xO3ug0wQznJGiSvTvjB2MXJysAnoSuy4+ZoZxBYRCJV4uuA7kM3BwSxQKdG9iB8kLCxgLnH27 wqwEhYBVYm3U2awgNi8AjYSH59PBItLCMhJNJy/D2ZzAsXn7/rBCmILCVhLNHy6yzyBkXsBI8 MqRo3i1KKy1CJdQwO9pKLM9IyS3MTMHCDPWC83tbg4MT01JzGpWC85P3cTI9C/9QwMjDsYt3U 5H2KU5GBSEuX9XnwvQogvKT+lMiOxOCO+qDQntfgQowwHh5IEr8cMoJxgUWp6akVaZg4w0GDS Ehw8SiK8H6YDpXmLCxJzizPTIVKnGBWlxHmPgfQJgCQySvPg2mDBfYlRVkqYl5GBgUGIpyC1K DezBFX+FaM4B6OSMO9qkCk8mXklcNNfAS1mAlps8fUuyOKSRISUVANj0kOf9bfNvJete77Jle to3ZqvKid0DVaI2KY7PTMobZvDrsfwwSW4eNL205tXbjgoeCe6XvdvU3Ay6wPe7fn+5z5Gu2z obkk4GRJ5Omva8WS3GUzVDP9cCgpZUj9ceLzDbr6UrVl0vv6ejHfKf//s9LfUyH9iv3v7UQtm CcP/HhfDuaMj3a4qsRRnJBpqMRcVJwIAZusqsWkCAAA= X-Env-Sender: andre.przywara@arm.com X-Msg-Ref: server-5.tower-31.messagelabs.com!1490983437!90041168!1 X-Originating-IP: [217.140.101.70] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 9.2.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 45865 invoked from network); 31 Mar 2017 18:03:57 -0000 Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by server-5.tower-31.messagelabs.com with SMTP; 31 Mar 2017 18:03:57 -0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CB26AB16; Fri, 31 Mar 2017 11:03:56 -0700 (PDT) Received: from e104803-lin.lan (unknown [10.1.207.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C65F33F59A; Fri, 31 Mar 2017 11:03:55 -0700 (PDT) From: Andre Przywara To: Julien Grall , Stefano Stabellini Date: Fri, 31 Mar 2017 19:05:21 +0100 Message-Id: <20170331180525.30038-23-andre.przywara@arm.com> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20170331180525.30038-1-andre.przywara@arm.com> References: <20170331180525.30038-1-andre.przywara@arm.com> Cc: xen-devel@lists.xenproject.org, Shanker Donthineni , Vijay Kilari Subject: [Xen-devel] [PATCH v3 22/26] ARM: vITS: handle INV command X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP The INV command instructs the ITS to update the configuration data for a given LPI by re-reading its entry from the property table. We don't need to care so much about the priority value, but enabling or disabling an LPI has some effect: We remove or push virtual LPIs to their VCPUs, also check the virtual pending bit if an LPI gets enabled. Signed-off-by: Andre Przywara --- xen/arch/arm/vgic-v3-its.c | 62 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c index 59553f8..0c479e0 100644 --- a/xen/arch/arm/vgic-v3-its.c +++ b/xen/arch/arm/vgic-v3-its.c @@ -360,6 +360,65 @@ static int its_handle_int(struct virt_its *its, uint64_t *cmdptr) return 0; } +/* + * For a given virtual LPI read the enabled bit and priority from the virtual + * property table and update the virtual IRQ's state. + * This takes care of removing or pushing of virtual LPIs to their VCPUs. + */ +static void update_lpi_enabled_status(struct virt_its* its, + struct vcpu *vcpu, uint32_t vlpi) +{ + struct pending_irq *p = lpi_to_pending(its->d, vlpi); + paddr_t proptable_addr; + uint8_t *property; + + if ( !p ) + return; + + proptable_addr = its->d->arch.vgic.rdist_propbase & GENMASK_ULL(51, 12); + property = map_one_guest_page(its->d, proptable_addr + vlpi - LPI_OFFSET); + + p->lpi_priority = *property & LPI_PROP_PRIO_MASK; + + if ( *property & LPI_PROP_ENABLED ) + { + unsigned long flags; + + set_bit(GIC_IRQ_GUEST_ENABLED, &p->status); + spin_lock_irqsave(&vcpu->arch.vgic.lock, flags); + if ( !list_empty(&p->inflight) && + !test_bit(GIC_IRQ_GUEST_VISIBLE, &p->status) ) + gic_raise_guest_irq(vcpu, vlpi, p->lpi_priority); + spin_unlock_irqrestore(&vcpu->arch.vgic.lock, flags); + + /* Check whether the LPI has fired while the guest had it disabled. */ + if ( test_and_clear_bit(GIC_IRQ_GUEST_LPI_PENDING, &p->status) ) + vgic_vcpu_inject_irq(vcpu, vlpi); + } + else + { + clear_bit(GIC_IRQ_GUEST_ENABLED, &p->status); + gic_remove_from_queues(vcpu, vlpi); + } + + unmap_one_guest_page(property); +} + +static int its_handle_inv(struct virt_its *its, uint64_t *cmdptr) +{ + uint32_t devid = its_cmd_get_deviceid(cmdptr); + uint32_t eventid = its_cmd_get_id(cmdptr); + struct vcpu *vcpu; + uint32_t vlpi; + + if ( !read_itte(its, devid, eventid, &vcpu, &vlpi) ) + return -1; + + update_lpi_enabled_status(its, vcpu, vlpi); + + return 0; +} + static int its_handle_mapc(struct virt_its *its, uint64_t *cmdptr) { uint32_t collid = its_cmd_get_collection(cmdptr); @@ -540,6 +599,9 @@ static int vgic_its_handle_cmds(struct domain *d, struct virt_its *its, case GITS_CMD_INT: ret = its_handle_int(its, cmdptr); break; + case GITS_CMD_INV: + ret = its_handle_inv(its, cmdptr); + break; case GITS_CMD_MAPC: ret = its_handle_mapc(its, cmdptr); break;