| Message ID | 20170424174608.32026-2-mohit.gambhir@oracle.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 04/24/2017 01:46 PM, Mohit Gambhir wrote: > This patch adds Intel PMU MSR addresses as macros for VPMU testing > > Signed-off-by: Mohit Gambhir <mohit.gambhir@oracle.com> > --- > arch/x86/include/arch/msr-index.h | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/x86/include/arch/msr-index.h b/arch/x86/include/arch/msr-index.h > index 2e90079..3a79025 100644 > --- a/arch/x86/include/arch/msr-index.h > +++ b/arch/x86/include/arch/msr-index.h > @@ -38,6 +38,17 @@ > #define MSR_GS_BASE 0xc0000101 > #define MSR_SHADOW_GS_BASE 0xc0000102 > > +#define MSR_IA32_PMC(n) (0x000000c1 + (n)) > +#define MSR_IA32_PERFEVTSEL(n) (0x00000186 + (n)) > +#define MSR_IA32_DEBUGCTL 0x000001d9 > +#define MSR_IA32_FIXED_CTR(n) (0x00000309 + (n)) > +#define MSR_IA32_FIXED_CTR_CTRL 0x0000038d > +#define MSR_IA32_PERF_GLOBAL_CTRL 0x0000038f > +#define MSR_IA32_PERF_GLOBAL_STATUS 0x0000038e > +#define MSR_IA32_PERF_GLOBAL_OVF_CTRL 0x00000390 > +#define MSR_IA32_PERF_CAPABILITIES 0x00000345 Seems I can not sort correctly. :( Will resend this patch. > +#define MSR_IA32_A_PMC(n) (0x000004c1 + (n)) > + > #endif /* XFT_X86_MSR_INDEX_H */ > > /*
diff --git a/arch/x86/include/arch/msr-index.h b/arch/x86/include/arch/msr-index.h index 2e90079..3a79025 100644 --- a/arch/x86/include/arch/msr-index.h +++ b/arch/x86/include/arch/msr-index.h @@ -38,6 +38,17 @@ #define MSR_GS_BASE 0xc0000101 #define MSR_SHADOW_GS_BASE 0xc0000102 +#define MSR_IA32_PMC(n) (0x000000c1 + (n)) +#define MSR_IA32_PERFEVTSEL(n) (0x00000186 + (n)) +#define MSR_IA32_DEBUGCTL 0x000001d9 +#define MSR_IA32_FIXED_CTR(n) (0x00000309 + (n)) +#define MSR_IA32_FIXED_CTR_CTRL 0x0000038d +#define MSR_IA32_PERF_GLOBAL_CTRL 0x0000038f +#define MSR_IA32_PERF_GLOBAL_STATUS 0x0000038e +#define MSR_IA32_PERF_GLOBAL_OVF_CTRL 0x00000390 +#define MSR_IA32_PERF_CAPABILITIES 0x00000345 +#define MSR_IA32_A_PMC(n) (0x000004c1 + (n)) + #endif /* XFT_X86_MSR_INDEX_H */ /*
This patch adds Intel PMU MSR addresses as macros for VPMU testing Signed-off-by: Mohit Gambhir <mohit.gambhir@oracle.com> --- arch/x86/include/arch/msr-index.h | 11 +++++++++++ 1 file changed, 11 insertions(+)