@@ -31,35 +31,6 @@
#include <asm/gic.h>
#include <asm/vgic.h>
-static inline struct vgic_irq_rank *vgic_get_rank(struct vcpu *v, int rank)
-{
- if ( rank == 0 )
- return v->arch.vgic.private_irqs;
- else if ( rank <= DOMAIN_NR_RANKS(v->domain) )
- return &v->domain->arch.vgic.shared_irqs[rank - 1];
- else
- return NULL;
-}
-
-/*
- * Returns rank corresponding to a GICD_<FOO><n> register for
- * GICD_<FOO> with <b>-bits-per-interrupt.
- */
-struct vgic_irq_rank *vgic_rank_offset(struct vcpu *v, int b, int n,
- int s)
-{
- int rank = REG_RANK_NR(b, (n >> s));
-
- return vgic_get_rank(v, rank);
-}
-
-struct vgic_irq_rank *vgic_rank_irq(struct vcpu *v, unsigned int irq)
-{
- int rank = irq/32;
-
- return vgic_get_rank(v, rank);
-}
-
static void vgic_init_pending_irq(struct pending_irq *p, unsigned int virq,
int vcpu_id)
{
@@ -70,14 +41,6 @@ static void vgic_init_pending_irq(struct pending_irq *p, unsigned int virq,
p->vcpu_id = vcpu_id;
}
-static void vgic_rank_init(struct vgic_irq_rank *rank, uint8_t index,
- unsigned int vcpu)
-{
- spin_lock_init(&rank->lock);
-
- rank->index = index;
-}
-
int domain_vgic_register(struct domain *d, int *mmio_count)
{
switch ( d->arch.vgic.version )
@@ -116,11 +79,6 @@ int domain_vgic_init(struct domain *d, unsigned int nr_spis)
spin_lock_init(&d->arch.vgic.lock);
- d->arch.vgic.shared_irqs =
- xzalloc_array(struct vgic_irq_rank, DOMAIN_NR_RANKS(d));
- if ( d->arch.vgic.shared_irqs == NULL )
- return -ENOMEM;
-
d->arch.vgic.pending_irqs =
xzalloc_array(struct pending_irq, d->arch.vgic.nr_spis);
if ( d->arch.vgic.pending_irqs == NULL )
@@ -130,10 +88,6 @@ int domain_vgic_init(struct domain *d, unsigned int nr_spis)
for (i=0; i<d->arch.vgic.nr_spis; i++)
vgic_init_pending_irq(&d->arch.vgic.pending_irqs[i], i + 32, 0);
- /* SPIs are routed to VCPU0 by default */
- for ( i = 0; i < DOMAIN_NR_RANKS(d); i++ )
- vgic_rank_init(&d->arch.vgic.shared_irqs[i], i + 1, 0);
-
ret = d->arch.vgic.handler->domain_init(d);
if ( ret )
return ret;
@@ -174,7 +128,6 @@ void domain_vgic_free(struct domain *d)
}
d->arch.vgic.handler->domain_free(d);
- xfree(d->arch.vgic.shared_irqs);
xfree(d->arch.vgic.pending_irqs);
xfree(d->arch.vgic.allocated_irqs);
}
@@ -183,13 +136,6 @@ int vcpu_vgic_init(struct vcpu *v)
{
int i;
- v->arch.vgic.private_irqs = xzalloc(struct vgic_irq_rank);
- if ( v->arch.vgic.private_irqs == NULL )
- return -ENOMEM;
-
- /* SGIs/PPIs are always routed to this VCPU */
- vgic_rank_init(v->arch.vgic.private_irqs, 0, v->vcpu_id);
-
v->domain->arch.vgic.handler->vcpu_init(v);
memset(&v->arch.vgic.pending_irqs, 0, sizeof(v->arch.vgic.pending_irqs));
@@ -206,7 +152,6 @@ int vcpu_vgic_init(struct vcpu *v)
int vcpu_vgic_free(struct vcpu *v)
{
- xfree(v->arch.vgic.private_irqs);
return 0;
}
@@ -83,15 +83,12 @@ struct arch_domain
* shared_irqs where each member contains its own locking.
*
* If both class of lock is required then this lock must be
- * taken first. If multiple rank locks are required (including
- * the per-vcpu private_irqs rank) then they must be taken in
- * rank order.
+ * taken first.
*/
spinlock_t lock;
uint32_t ctlr;
int nr_spis; /* Number of SPIs */
unsigned long *allocated_irqs; /* bitmap of IRQs allocated */
- struct vgic_irq_rank *shared_irqs;
/*
* SPIs are domain global, SGIs and PPIs are per-VCPU and stored in
* struct arch_vcpu.
@@ -236,7 +233,6 @@ struct arch_vcpu
* struct arch_domain.
*/
struct pending_irq pending_irqs[32];
- struct vgic_irq_rank *private_irqs;
/* This list is ordered by IRQ priority and it is used to keep
* track of the IRQs that the VGIC injected into the guest.
@@ -96,16 +96,6 @@ struct pending_irq
spinlock_t lock;
};
-#define NR_INTERRUPT_PER_RANK 32
-#define INTERRUPT_RANK_MASK (NR_INTERRUPT_PER_RANK - 1)
-
-/* Represents state corresponding to a block of 32 interrupts */
-struct vgic_irq_rank {
- spinlock_t lock; /* Covers access to all other members of this struct */
-
- uint8_t index;
-};
-
struct sgi_target {
uint8_t aff1;
uint16_t list;
@@ -130,39 +120,9 @@ struct vgic_ops {
const unsigned int max_vcpus;
};
-/* Number of ranks of interrupt registers for a domain */
-#define DOMAIN_NR_RANKS(d) (((d)->arch.vgic.nr_spis+31)/32)
-
#define vgic_lock(v) spin_lock_irq(&(v)->domain->arch.vgic.lock)
#define vgic_unlock(v) spin_unlock_irq(&(v)->domain->arch.vgic.lock)
-#define vgic_lock_rank(v, r, flags) spin_lock_irqsave(&(r)->lock, flags)
-#define vgic_unlock_rank(v, r, flags) spin_unlock_irqrestore(&(r)->lock, flags)
-
-/*
- * Rank containing GICD_<FOO><n> for GICD_<FOO> with
- * <b>-bits-per-interrupt
- */
-static inline int REG_RANK_NR(int b, uint32_t n)
-{
- switch ( b )
- {
- /*
- * IRQ ranks are of size 32. So n cannot be shifted beyond 5 for 32
- * and above. For 64-bit n is already shifted DBAT_DOUBLE_WORD
- * by the caller
- */
- case 64:
- case 32: return n >> 5;
- case 16: return n >> 4;
- case 8: return n >> 3;
- case 4: return n >> 2;
- case 2: return n >> 1;
- case 1: return n;
- default: BUG();
- }
-}
-
uint32_t gather_irq_info_priority(struct vcpu *v, unsigned int irq);
void scatter_irq_info_priority(struct vcpu *v, unsigned int irq,
unsigned int value);
@@ -283,12 +243,6 @@ VGIC_REG_HELPERS(32, 0x3);
enum gic_sgi_mode;
-/*
- * Offset of GICD_<FOO><n> with its rank, for GICD_<FOO> size <s> with
- * <b>-bits-per-interrupt.
- */
-#define REG_RANK_INDEX(b, n, s) ((((n) >> s) & ((b)-1)) % 32)
-
#define vgic_num_irqs(d) ((d)->arch.vgic.nr_spis + 32)
extern int domain_vgic_init(struct domain *d, unsigned int nr_spis);
@@ -306,8 +260,6 @@ extern void vgic_put_pending_irq(struct domain *d, struct pending_irq *p);
extern void vgic_put_pending_irq_unlock(struct domain *d,
struct pending_irq *p);
extern struct pending_irq *spi_to_pending(struct domain *d, unsigned int irq);
-extern struct vgic_irq_rank *vgic_rank_offset(struct vcpu *v, int b, int n, int s);
-extern struct vgic_irq_rank *vgic_rank_irq(struct vcpu *v, unsigned int irq);
extern bool vgic_emulate(struct cpu_user_regs *regs, union hsr hsr);
extern void vgic_disable_irqs(struct vcpu *v, unsigned int irq, uint32_t r);
extern void vgic_enable_irqs(struct vcpu *v, unsigned int irq, uint32_t r);
Now that every information formerly stored in the irq_rank has been transferred over to struct pending_irq, we can get rid of all dead code declaring and initializing the structure and all the support functions. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- xen/arch/arm/vgic.c | 55 -------------------------------------------- xen/include/asm-arm/domain.h | 6 +---- xen/include/asm-arm/vgic.h | 48 -------------------------------------- 3 files changed, 1 insertion(+), 108 deletions(-)