From patchwork Thu May 4 15:31:15 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 9712155 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E311B6020B for ; Thu, 4 May 2017 15:31:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D6359284D1 for ; Thu, 4 May 2017 15:31:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CAE0C286B8; Thu, 4 May 2017 15:31:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 374EB28697 for ; Thu, 4 May 2017 15:31:25 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1d6Igu-0004Gb-1T; Thu, 04 May 2017 15:29:16 +0000 Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1d6Igs-0004Fl-UU for xen-devel@lists.xenproject.org; Thu, 04 May 2017 15:29:15 +0000 Received: from [193.109.254.147] by server-1.bemta-6.messagelabs.com id A9/ED-03869-AC84B095; Thu, 04 May 2017 15:29:14 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrGLMWRWlGSWpSXmKPExsVysyfVTfekB3e kQfcyTYvvWyYzOTB6HP5whSWAMYo1My8pvyKBNWPiTa6C3yoVEz6sYmxgvCTbxcjFISSwmVHi 5O7dzBDOckaJDWcfsnUxcnKwCehK7Lj5mhnEFhEIlXi64DuYzSygJLH/7DVGEFtYwEPi9q197 CA2i4CqxP2JK8HivAJWEnvb34PFJQTkJBrO3wfr5RSwlti7dzeYLQRU8+HJSbYJjNwLGBlWMW oUpxaVpRbpGlnqJRVlpmeU5CZm5ugaGpjp5aYWFyemp+YkJhXrJefnbmIE+pcBCHYwHlgUeIh RkoNJSZRX/RV7pBBfUn5KZUZicUZ8UWlOavEhRhkODiUJ3hnu3JFCgkWp6akVaZk5wECDSUtw 8CiJ8H4ESfMWFyTmFmemQ6ROMSpKifOuAEkIgCQySvPg2mDBfYlRVkqYlxHoECGegtSi3MwSV PlXjOIcjErCvGdBpvBk5pXATX8FtJgJaHGzLAfI4pJEhJRUA2PrknfTvnInrf+3r7FtWu/f/R mvM8zTtj4+5XZrRXbEzh8Vxa/vxBhun/Zzmr2cxQLjTOW1HBO63gWKOIT/uvAzJbF8q3lcn4B dhW2RbJ11dU/jq8CStf1C6VbNGy/ldLxgzXxz/iPXhlqRhfmrrUy8bG7F7VPf9kt9BV/Uidsf l5w8d14uUluJpTgj0VCLuag4EQAMf2hnaQIAAA== X-Env-Sender: andre.przywara@arm.com X-Msg-Ref: server-16.tower-27.messagelabs.com!1493911753!100096550!1 X-Originating-IP: [217.140.101.70] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 9.4.12; banners=-,-,- X-VirusChecked: Checked Received: (qmail 31372 invoked from network); 4 May 2017 15:29:13 -0000 Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by server-16.tower-27.messagelabs.com with SMTP; 4 May 2017 15:29:13 -0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C7CB01509; Thu, 4 May 2017 08:29:12 -0700 (PDT) Received: from e104803-lin.lan (unknown [10.1.207.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 124623F5CF; Thu, 4 May 2017 08:29:11 -0700 (PDT) From: Andre Przywara To: Julien Grall , Stefano Stabellini Date: Thu, 4 May 2017 16:31:15 +0100 Message-Id: <20170504153123.1204-3-andre.przywara@arm.com> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20170504153123.1204-1-andre.przywara@arm.com> References: <20170504153123.1204-1-andre.przywara@arm.com> Cc: xen-devel@lists.xenproject.org Subject: [Xen-devel] [RFC PATCH 02/10] ARM: vGIC: rework gic_raise_*_irq() functions X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Currently gic_raise_inflight_irq() and gic_raise_guest_irq() are used to queue interrupts to a VCPU, for which they are given a VCPU and an interrupt number. To allow proper locking and simplify further changes, change their prototypes to take a struct pending_irq directly (since the callers have the pointer already anyway). Signed-off-by: Andre Przywara --- xen/arch/arm/gic.c | 15 ++++++--------- xen/arch/arm/vgic.c | 6 +++--- xen/include/asm-arm/gic.h | 5 ++--- 3 files changed, 11 insertions(+), 15 deletions(-) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index c734f66..67375a2 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -391,10 +391,8 @@ void gic_remove_from_queues(struct vcpu *v, unsigned int virtual_irq) spin_unlock_irqrestore(&v->arch.vgic.lock, flags); } -void gic_raise_inflight_irq(struct vcpu *v, unsigned int virtual_irq) +void gic_raise_inflight_irq(struct vcpu *v, struct pending_irq *n) { - struct pending_irq *n = irq_to_pending(v, virtual_irq); - ASSERT(spin_is_locked(&v->arch.vgic.lock)); if ( list_empty(&n->lr_queue) ) @@ -405,12 +403,11 @@ void gic_raise_inflight_irq(struct vcpu *v, unsigned int virtual_irq) #ifdef GIC_DEBUG else gdprintk(XENLOG_DEBUG, "trying to inject irq=%u into d%dv%d, when it is still lr_pending\n", - virtual_irq, v->domain->domain_id, v->vcpu_id); + n->irq, v->domain->domain_id, v->vcpu_id); #endif } -void gic_raise_guest_irq(struct vcpu *v, unsigned int virtual_irq, - unsigned int priority) +void gic_raise_guest_irq(struct vcpu *v, struct pending_irq *p) { int i; unsigned int nr_lrs = gic_hw_ops->info->nr_lrs; @@ -422,12 +419,12 @@ void gic_raise_guest_irq(struct vcpu *v, unsigned int virtual_irq, i = find_first_zero_bit(&this_cpu(lr_mask), nr_lrs); if (i < nr_lrs) { set_bit(i, &this_cpu(lr_mask)); - gic_set_lr(i, irq_to_pending(v, virtual_irq), GICH_LR_PENDING); + gic_set_lr(i, p, GICH_LR_PENDING); return; } } - gic_add_to_lr_pending(v, irq_to_pending(v, virtual_irq)); + gic_add_to_lr_pending(v, p); } static void gic_update_one_lr(struct vcpu *v, int i) @@ -480,7 +477,7 @@ static void gic_update_one_lr(struct vcpu *v, int i) if ( test_bit(GIC_IRQ_GUEST_ENABLED, &p->status) && test_bit(GIC_IRQ_GUEST_QUEUED, &p->status) && !test_bit(GIC_IRQ_GUEST_MIGRATING, &p->status) ) - gic_raise_guest_irq(v, irq, p->priority); + gic_raise_guest_irq(v, p); else { list_del_init(&p->inflight); /* diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index 83569b0..f359ecb 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -359,7 +359,7 @@ void vgic_enable_irqs(struct vcpu *v, uint32_t r, int n) set_bit(GIC_IRQ_GUEST_ENABLED, &p->status); spin_lock_irqsave(&v_target->arch.vgic.lock, flags); if ( !list_empty(&p->inflight) && !test_bit(GIC_IRQ_GUEST_VISIBLE, &p->status) ) - gic_raise_guest_irq(v_target, irq, p->priority); + gic_raise_guest_irq(v_target, p); spin_unlock_irqrestore(&v_target->arch.vgic.lock, flags); if ( p->desc != NULL ) { @@ -485,7 +485,7 @@ void vgic_vcpu_inject_irq(struct vcpu *v, unsigned int virq) if ( !list_empty(&n->inflight) ) { - gic_raise_inflight_irq(v, virq); + gic_raise_inflight_irq(v, n); goto out; } @@ -493,7 +493,7 @@ void vgic_vcpu_inject_irq(struct vcpu *v, unsigned int virq) /* the irq is enabled */ if ( test_bit(GIC_IRQ_GUEST_ENABLED, &n->status) ) - gic_raise_guest_irq(v, virq, priority); + gic_raise_guest_irq(v, n); list_for_each_entry ( iter, &v->arch.vgic.inflight_irqs, inflight ) { diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h index 836a103..8872934 100644 --- a/xen/include/asm-arm/gic.h +++ b/xen/include/asm-arm/gic.h @@ -240,9 +240,8 @@ extern void gic_clear_pending_irqs(struct vcpu *v); extern int gic_events_need_delivery(void); extern void init_maintenance_interrupt(void); -extern void gic_raise_guest_irq(struct vcpu *v, unsigned int irq, - unsigned int priority); -extern void gic_raise_inflight_irq(struct vcpu *v, unsigned int virtual_irq); +extern void gic_raise_guest_irq(struct vcpu *v, struct pending_irq *p); +extern void gic_raise_inflight_irq(struct vcpu *v, struct pending_irq *p); extern void gic_remove_from_queues(struct vcpu *v, unsigned int virtual_irq); /* Accept an interrupt from the GIC and dispatch its handler */