@@ -86,6 +86,21 @@ typedef uint64_t dev_table_entry_t;
#define GITS_BASER_RO_MASK (GITS_BASER_TYPE_MASK | \
(31UL << GITS_BASER_ENTRY_SIZE_SHIFT))
+unsigned int vgic_v3_its_count(const struct domain *d)
+{
+ struct host_its *hw_its;
+ unsigned int ret = 0;
+
+ /* Only Dom0 can use emulated ITSes so far. */
+ if ( !is_hardware_domain(d) )
+ return 0;
+
+ list_for_each_entry(hw_its, &host_its_list, entry)
+ ret++;
+
+ return ret;
+}
+
int vgic_v3_its_init_domain(struct domain *d)
{
spin_lock_init(&d->arch.vgic.its_devices_lock);
@@ -1802,6 +1802,9 @@ int vgic_v3_init(struct domain *d, int *mmio_count)
/* GICD region + number of Redistributors */
*mmio_count = vgic_v3_rdist_count(d) + 1;
+ /* one region per ITS */
+ *mmio_count += vgic_v3_its_count(d);
+
register_vgic_ops(d, &v3_ops);
return 0;
@@ -137,6 +137,8 @@ void gicv3_its_dt_init(const struct dt_device_node *node);
bool gicv3_its_host_has_its(void);
+unsigned int vgic_v3_its_count(const struct domain *d);
+
void gicv3_do_LPI(unsigned int lpi);
int gicv3_lpi_init_rdist(void __iomem * rdist_base);
@@ -196,6 +198,11 @@ static inline bool gicv3_its_host_has_its(void)
return false;
}
+static inline unsigned int vgic_v3_its_count(const struct domain *d)
+{
+ return 0;
+}
+
static inline void gicv3_do_LPI(unsigned int lpi)
{
/* We don't enable LPIs without an ITS. */
Increase the count of MMIO regions needed by one for each ITS Dom0 has to emulate. We emulate the ITSes 1:1 from the hardware, so the number is the number of host ITSes. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- xen/arch/arm/vgic-v3-its.c | 15 +++++++++++++++ xen/arch/arm/vgic-v3.c | 3 +++ xen/include/asm-arm/gic_v3_its.h | 7 +++++++ 3 files changed, 25 insertions(+)