Message ID | 20170707134258.29711.87816.stgit@tlendack-t1.amdoffice.net (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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banners=-,-,- X-VirusChecked: Checked Received: (qmail 56104 invoked from network); 7 Jul 2017 13:43:07 -0000 Received: from mail-co1nam03on0072.outbound.protection.outlook.com (HELO NAM03-CO1-obe.outbound.protection.outlook.com) (104.47.40.72) by server-16.tower-31.messagelabs.com with AES256-SHA256 encrypted SMTP; 7 Jul 2017 13:43:07 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector1-amd-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=9JdqfmLVHYCrg0v5+Pitg9yzHyZd77lR0BvWKOO0Q9c=; b=ANT3d0cCGi0msfEq/lFqIByaLHYam5U/isiZzZDqm+AS4oRKOBL6P+Bv3slys5pj88n0Qyt1cSlAfMk0hFBvkcj9kEbvi0pCqN2NBj43RbUXhIHFFkBX/vtHb4hdz1IB9t96Td5bQhftAPOXy7cUz1B0O/5UooPeNYz2HPHiDJw= Received: from tlendack-t1.amdoffice.net (165.204.77.1) by MWHPR12MB1149.namprd12.prod.outlook.com (10.169.204.13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1240.13; Fri, 7 Jul 2017 13:43:01 +0000 From: Tom Lendacky <thomas.lendacky@amd.com> To: linux-arch@vger.kernel.org, linux-efi@vger.kernel.org, kvm@vger.kernel.org, linux-doc@vger.kernel.org, x86@kernel.org, kexec@lists.infradead.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, xen-devel@lists.xen.org, linux-mm@kvack.org, iommu@lists.linux-foundation.org Date: Fri, 07 Jul 2017 08:42:58 -0500 Message-ID: <20170707134258.29711.87816.stgit@tlendack-t1.amdoffice.net> In-Reply-To: <20170707133804.29711.1616.stgit@tlendack-t1.amdoffice.net> References: <20170707133804.29711.1616.stgit@tlendack-t1.amdoffice.net> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: DM5PR16CA0043.namprd16.prod.outlook.com (10.172.42.157) To MWHPR12MB1149.namprd12.prod.outlook.com (10.169.204.13) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 22ac3e26-3738-4dbb-86f6-08d4c53e1710 X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: UriScan:; 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Tsirkin" <mst@redhat.com>, Matt Fleming <matt@codeblueprint.co.uk>, Alexander Potapenko <glider@google.com>, "H. Peter Anvin" <hpa@zytor.com>, Boris Ostrovsky <boris.ostrovsky@oracle.com>, Jonathan Corbet <corbet@lwn.net>, Joerg Roedel <joro@8bytes.org>, Radim =?utf-8?b?S3LEjW3DocWZ?= <rkrcmar@redhat.com>, Larry Woodman <lwoodman@redhat.com>, Ingo Molnar <mingo@redhat.com>, Andrey Ryabinin <aryabinin@virtuozzo.com>, Dave Young <dyoung@redhat.com>, Rik van Riel <riel@redhat.com>, Arnd Bergmann <arnd@arndb.de>, Borislav Petkov <bp@alien8.de>, Andy Lutomirski <luto@kernel.org>, Thomas Gleixner <tglx@linutronix.de>, Dmitry Vyukov <dvyukov@google.com>, Juergen Gross <jgross@suse.com>, Paolo Bonzini <pbonzini@redhat.com> Subject: [Xen-devel] [PATCH v9 26/38] x86/CPU/AMD: Make the microcode level available earlier in the boot X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion <xen-devel.lists.xen.org> List-Unsubscribe: <https://lists.xen.org/cgi-bin/mailman/options/xen-devel>, <mailto:xen-devel-request@lists.xen.org?subject=unsubscribe> List-Post: <mailto:xen-devel@lists.xen.org> List-Help: <mailto:xen-devel-request@lists.xen.org?subject=help> List-Subscribe: <https://lists.xen.org/cgi-bin/mailman/listinfo/xen-devel>, <mailto:xen-devel-request@lists.xen.org?subject=subscribe> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" <xen-devel-bounces@lists.xen.org> X-Virus-Scanned: ClamAV using ClamSMTP |
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 5bdcbd4..fdcf305 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -547,8 +547,12 @@ static void bsp_init_amd(struct cpuinfo_x86 *c) static void early_init_amd(struct cpuinfo_x86 *c) { + u32 dummy; + early_init_amd_mc(c); + rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy); + /* * c->x86_power is 8000_0007 edx. Bit 8 is TSC runs at constant rate * with P/T states and does not stop in deep C-states @@ -746,8 +750,6 @@ static void init_amd_bd(struct cpuinfo_x86 *c) static void init_amd(struct cpuinfo_x86 *c) { - u32 dummy; - early_init_amd(c); /* @@ -809,8 +811,6 @@ static void init_amd(struct cpuinfo_x86 *c) if (c->x86 > 0x11) set_cpu_cap(c, X86_FEATURE_ARAT); - rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy); - /* 3DNow or LM implies PREFETCHW */ if (!cpu_has(c, X86_FEATURE_3DNOWPREFETCH)) if (cpu_has(c, X86_FEATURE_3DNOW) || cpu_has(c, X86_FEATURE_LM))