From patchwork Tue Jul 18 17:09:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anthony PERARD X-Patchwork-Id: 9849153 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8F2DF600CC for ; Tue, 18 Jul 2017 17:13:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 71ABF285C9 for ; Tue, 18 Jul 2017 17:13:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 66737285CB; Tue, 18 Jul 2017 17:13:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 67301285D4 for ; Tue, 18 Jul 2017 17:13:03 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dXW0Z-0003Tf-9T; Tue, 18 Jul 2017 17:10:03 +0000 Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dXW0X-0003Jg-9a for xen-devel@lists.xenproject.org; Tue, 18 Jul 2017 17:10:01 +0000 Received: from [193.109.254.147] by server-4.bemta-6.messagelabs.com id 1D/B2-02962-9E04E695; Tue, 18 Jul 2017 17:10:01 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupjkeJIrShJLcpLzFFi42JxWrohUveFQ16 kwY+Xqhbft0xmcmD0OPzhCksAYxRrZl5SfkUCa8bhq/tZC3oVKlq63RoYj4h1MXJySAj4S0x+ 9I4RxGYTMJBYMf0qkM3BISKgInF7rwFImFmgWuJRWytYibCAo8TmX3dZQUpYBFQlNp6UAQnzC thJtHf8Y4KYKC8xsXcaWDmngL3E3AXfWUBsIaCanxdPQtlqEjcWLmOB6BWUODnzCQvEKgmJgy 9eME9g5J2FJDULSWoBI9MqRo3i1KKy1CJdQxO9pKLM9IyS3MTMHF1DAzO93NTi4sT01JzEpGK 95PzcTYzAsGEAgh2M1zcGHGKU5GBSEuXdqpwXKcSXlJ9SmZFYnBFfVJqTWnyIUYaDQ0mC9409 UE6wKDU9tSItMwcYwDBpCQ4eJRHebyBp3uKCxNzizHSI1ClGXY5XE/5/YxJiycvPS5US530FU iQAUpRRmgc3AhZNlxhlpYR5GYGOEuIpSC3KzSxBlX/FKM7BqCTM2wIyhSczrwRu0yugI5iAjh D2zQE5oiQRISXVwBipfDqlPsWwKfK1/brPZqGHXy8VSbCfcszA6Hzq001zUmNLXl80bFIV5cz dayNZInld4OzLmLzptlVpzy4d3VAl0Vr4bUuLpUj9m0Ub/6WYW/NuvSm/8uCf27fOm8jyPpTi SON6XVidOeW4tVdR2l0Z++Co3xtY0zewHTmz6FCInnaf6+PiYCWW4oxEQy3mouJEADGqSyuhA gAA X-Env-Sender: prvs=365e4ded5=anthony.perard@citrix.com X-Msg-Ref: server-16.tower-27.messagelabs.com!1500397795!107423845!2 X-Originating-IP: [66.165.176.89] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni44OSA9PiAyMDMwMDc=\n, received_headers: No Received headers X-StarScan-Received: X-StarScan-Version: 9.4.25; banners=-,-,- X-VirusChecked: Checked Received: (qmail 30766 invoked from network); 18 Jul 2017 17:10:00 -0000 Received: from smtp.citrix.com (HELO SMTP.CITRIX.COM) (66.165.176.89) by server-16.tower-27.messagelabs.com with RC4-SHA encrypted SMTP; 18 Jul 2017 17:10:00 -0000 X-IronPort-AV: E=Sophos;i="5.40,378,1496102400"; d="scan'208";a="431960131" From: Anthony PERARD To: Date: Tue, 18 Jul 2017 18:09:33 +0100 Message-ID: <20170718170935.25648-2-anthony.perard@citrix.com> X-Mailer: git-send-email 2.13.3 In-Reply-To: <20170718170935.25648-1-anthony.perard@citrix.com> References: <20170718170935.25648-1-anthony.perard@citrix.com> MIME-Version: 1.0 Cc: Anthony PERARD , Andrew Cooper , Jan Beulich Subject: [Xen-devel] [PATCH v2 1/3] x86/vlapic: Introduce vlapic_update_timer X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP There should not be any functionality change with this patch. This function is used when the APIC_TMICT register is updated. vlapic_update_timer is introduce as it will be use also when the registers APIC_LVTT and APIC_TDCR are updated. Signed-off-by: Anthony PERARD --- xen/arch/x86/hvm/vlapic.c | 79 +++++++++++++++++++++++++++++++---------------- 1 file changed, 53 insertions(+), 26 deletions(-) diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index 4320c6e30a..883114c824 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -668,6 +668,57 @@ static void vlapic_tdt_pt_cb(struct vcpu *v, void *data) vcpu_vlapic(v)->hw.tdt_msr = 0; } +/* + * This function is used when a register related to the APIC timer is updated. + * It expect the new value for the register TMICT to be set *before* + * been called. + * It expect the new value of LVTT to be set *after* been called, with this new + * values passed as parameter (only APIC_TIMER_MODE_MASK bits matter). + */ +static void vlapic_update_timer(struct vlapic *vlapic, uint32_t lvtt); +{ + uint64_t period; + uint64_t delta; + bool is_periodic; + + is_periodic = (lvtt & APIC_TIMER_MODE_MASK) == APIC_TIMER_MODE_PERIODIC; + + period = (uint64_t)vlapic_get_reg(vlapic, APIC_TMICT) + * APIC_BUS_CYCLE_NS * vlapic->hw.timer_divisor; + + /* Calculate the next time the timer should trigger an interrupt. */ + delta = period; + + if ( delta ) + { + TRACE_2_LONG_3D(TRC_HVM_EMUL_LAPIC_START_TIMER, TRC_PAR_LONG(delta), + TRC_PAR_LONG(is_periodic ? period : 0LL), + vlapic->pt.irq); + + create_periodic_time(current, &vlapic->pt, + delta, + is_periodic ? period : 0, + vlapic->pt.irq, + is_periodic ? vlapic_pt_cb : NULL, + &vlapic->timer_last_update); + + vlapic->timer_last_update = vlapic->pt.last_plt_gtime; + + HVM_DBG_LOG(DBG_LEVEL_VLAPIC, + "bus cycle is %uns, " + "initial count %u, period %"PRIu64"ns", + APIC_BUS_CYCLE_NS, + vlapic_get_reg(vlapic, APIC_TMICT), + period); + } + else + { + TRACE_0D(TRC_HVM_EMUL_LAPIC_STOP_TIMER); + destroy_periodic_time(&vlapic->pt); + } +} + + static void vlapic_reg_write(struct vcpu *v, unsigned int offset, uint32_t val) { @@ -764,37 +815,13 @@ static void vlapic_reg_write(struct vcpu *v, break; case APIC_TMICT: - { - uint64_t period; - if ( !vlapic_lvtt_oneshot(vlapic) && !vlapic_lvtt_period(vlapic) ) break; vlapic_set_reg(vlapic, APIC_TMICT, val); - if ( val == 0 ) - { - TRACE_0D(TRC_HVM_EMUL_LAPIC_STOP_TIMER); - destroy_periodic_time(&vlapic->pt); - break; - } - - period = (uint64_t)APIC_BUS_CYCLE_NS * val * vlapic->hw.timer_divisor; - TRACE_2_LONG_3D(TRC_HVM_EMUL_LAPIC_START_TIMER, TRC_PAR_LONG(period), - TRC_PAR_LONG(vlapic_lvtt_period(vlapic) ? period : 0LL), - vlapic->pt.irq); - create_periodic_time(current, &vlapic->pt, period, - vlapic_lvtt_period(vlapic) ? period : 0, - vlapic->pt.irq, - vlapic_lvtt_period(vlapic) ? vlapic_pt_cb : NULL, - &vlapic->timer_last_update); - vlapic->timer_last_update = vlapic->pt.last_plt_gtime; - HVM_DBG_LOG(DBG_LEVEL_VLAPIC, - "bus cycle is %uns, " - "initial count %u, period %"PRIu64"ns", - APIC_BUS_CYCLE_NS, val, period); - } - break; + vlapic_update_timer(vlapic, vlapic_get_reg(vlapic, APIC_LVTT)); + break; case APIC_TDCR: vlapic_set_tdcr(vlapic, val & 0xb);