From patchwork Fri Jul 21 19:59:55 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 9857619 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5102D60393 for ; Fri, 21 Jul 2017 20:02:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 437F52863B for ; Fri, 21 Jul 2017 20:02:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 386522864F; Fri, 21 Jul 2017 20:02:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DA5DE28654 for ; Fri, 21 Jul 2017 20:02:32 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dYe5p-00056g-If; Fri, 21 Jul 2017 20:00:09 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dYe5o-00055Y-IU for xen-devel@lists.xenproject.org; Fri, 21 Jul 2017 20:00:08 +0000 Received: from [85.158.139.211] by server-5.bemta-5.messagelabs.com id 30/82-02177-74D52795; Fri, 21 Jul 2017 20:00:07 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrMLMWRWlGSWpSXmKPExsVysyfVTdc9tij S4FCvvMX3LZOZHBg9Dn+4whLAGMWamZeUX5HAmnH+9zzmgr/CFfs657A1MD7i72Lk4hAS2MQo cez5Q0YIZzmjxIobK9i7GDk52AR0JXbcfM0MYosIhEo8XfAdzGYWUJLYf/YaI4gtLOApcfz+b VYQm0VAVWLxkTlMIDavgLXEzOs/wOZICMhJNJy/D9bLKWAjseLyEzYQWwiopnnxVJYJjNwLGB lWMWoUpxaVpRbpGpnoJRVlpmeU5CZm5ugaGpjq5aYWFyemp+YkJhXrJefnbmIEeriegYFxB+P NyX6HGCU5mJREeTWtiiKF+JLyUyozEosz4otKc1KLDzHKcHAoSfCuigHKCRalpqdWpGXmAEMN Ji3BwaMkwtsHkuYtLkjMLc5Mh0idYtTleDXh/zcmIZa8/LxUKXHeGJAiAZCijNI8uBGwsL/EK CslzMvIwMAgxFOQWpSbWYIq/4pRnINRSZjXDGQKT2ZeCdymV0BHMAEd8citAOSIkkSElFQD40 TG5ktvRX19Xoj3v/32ui9uxcI1b/miM5ee3aWzOnoxZ8k/1fmu5xIiHLa9sbkfsGi7TkxiXdQ jJm/Nv/8zVSMU3PVeOxm51C8Ufqjpsmj2u6Si6+0XnJfPOZxQqNiYGXjgJmPghbe/1I7WWx0I SM0zOKIrbeCf+2Hd4cpvMbLsKuwx+ibzlViKMxINtZiLihMBYK1uNXYCAAA= X-Env-Sender: andre.przywara@arm.com X-Msg-Ref: server-13.tower-206.messagelabs.com!1500667207!88476379!1 X-Originating-IP: [217.140.101.70] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 9.4.25; banners=-,-,- X-VirusChecked: Checked Received: (qmail 58383 invoked from network); 21 Jul 2017 20:00:07 -0000 Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by server-13.tower-206.messagelabs.com with SMTP; 21 Jul 2017 20:00:07 -0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B798F80D; Fri, 21 Jul 2017 13:00:06 -0700 (PDT) Received: from e104803-lin.lan (unknown [10.1.207.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EB3053F3E1; Fri, 21 Jul 2017 13:00:05 -0700 (PDT) From: Andre Przywara To: Julien Grall , Stefano Stabellini Date: Fri, 21 Jul 2017 20:59:55 +0100 Message-Id: <20170721200010.29010-8-andre.przywara@arm.com> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20170721200010.29010-1-andre.przywara@arm.com> References: <20170721200010.29010-1-andre.przywara@arm.com> Cc: xen-devel@lists.xenproject.org Subject: [Xen-devel] [RFC PATCH v2 07/22] ARM: vGIC: introduce priority setter/getter X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Since the GICs MMIO access always covers a number of IRQs at once, introduce wrapper functions which loop over those IRQs, take their locks and read or update the priority values. This will be used in a later patch. Signed-off-by: Andre Przywara --- xen/arch/arm/vgic.c | 37 +++++++++++++++++++++++++++++++++++++ xen/include/asm-arm/vgic.h | 5 +++++ 2 files changed, 42 insertions(+) diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index 434b7e2..b2c9632 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -243,6 +243,43 @@ static int vgic_get_virq_priority(struct vcpu *v, unsigned int virq) return ACCESS_ONCE(rank->priority[virq & INTERRUPT_RANK_MASK]); } +#define MAX_IRQS_PER_IPRIORITYR 4 +uint32_t vgic_fetch_irq_priority(struct vcpu *v, unsigned int nrirqs, + unsigned int first_irq) +{ + struct pending_irq *pirqs[MAX_IRQS_PER_IPRIORITYR]; + unsigned long flags; + uint32_t ret = 0, i; + + local_irq_save(flags); + vgic_lock_irqs(v, nrirqs, first_irq, pirqs); + + for ( i = 0; i < nrirqs; i++ ) + ret |= pirqs[i]->priority << (i * 8); + + vgic_unlock_irqs(pirqs, nrirqs); + local_irq_restore(flags); + + return ret; +} + +void vgic_store_irq_priority(struct vcpu *v, unsigned int nrirqs, + unsigned int first_irq, uint32_t value) +{ + struct pending_irq *pirqs[MAX_IRQS_PER_IPRIORITYR]; + unsigned long flags; + unsigned int i; + + local_irq_save(flags); + vgic_lock_irqs(v, nrirqs, first_irq, pirqs); + + for ( i = 0; i < nrirqs; i++, value >>= 8 ) + pirqs[i]->priority = value & 0xff; + + vgic_unlock_irqs(pirqs, nrirqs); + local_irq_restore(flags); +} + bool vgic_migrate_irq(struct vcpu *old, struct vcpu *new, unsigned int irq) { unsigned long flags; diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h index ecf4969..f3791c8 100644 --- a/xen/include/asm-arm/vgic.h +++ b/xen/include/asm-arm/vgic.h @@ -198,6 +198,11 @@ void vgic_lock_irqs(struct vcpu *v, unsigned int nrirqs, unsigned int first_irq, struct pending_irq **pirqs); void vgic_unlock_irqs(struct pending_irq **pirqs, unsigned int nrirqs); +uint32_t vgic_fetch_irq_priority(struct vcpu *v, unsigned int nrirqs, + unsigned int first_irq); +void vgic_store_irq_priority(struct vcpu *v, unsigned int nrirqs, + unsigned int first_irq, uint32_t reg); + enum gic_sgi_mode; /*