From patchwork Mon Jul 24 13:47:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergey Dyasli X-Patchwork-Id: 9859419 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A4D166038F for ; Mon, 24 Jul 2017 13:50:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9674B27F97 for ; Mon, 24 Jul 2017 13:50:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 89F8828572; Mon, 24 Jul 2017 13:50:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5F8E828408 for ; Mon, 24 Jul 2017 13:50:25 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dZdiE-0001Pu-K2; Mon, 24 Jul 2017 13:47:54 +0000 Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dZdiC-0001OU-5O for xen-devel@lists.xen.org; Mon, 24 Jul 2017 13:47:52 +0000 Received: from [193.109.254.147] by server-4.bemta-6.messagelabs.com id BC/0B-02962-78AF5795; Mon, 24 Jul 2017 13:47:51 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprEIsWRWlGSWpSXmKPExsXitHRDpG7br9J Ig09H9CyWfFzM4sDocXT3b6YAxijWzLyk/IoE1ozWi//YC347Viy6uoi1gfGzQRcjJ4eEgL/E xhWtbCA2m4CexMbZr5hAbBEBWYnVXXPYuxi5OJgFjjBKTF11hB0kISxgLvHv/jewIhYBVYnPN 9eAxXkFbCQmLuxngRgqL7Gr7SIriM0pYCtx+N5yZhBbCKhm1cx1rBC2qsTrF7tYIHoFJU7OfA JmMwtISBx88YJ5AiPvLCSpWUhSCxiZVjFqFKcWlaUW6Rqa6iUVZaZnlOQmZuboGhqY6eWmFhc npqfmJCYV6yXn525iBIYPAxDsYPy2LOAQoyQHk5Io7/J1RZFCfEn5KZUZicUZ8UWlOanFhxhl ODiUJHh9fpZGCgkWpaanVqRl5gADGSYtwcGjJMJ79QdQmre4IDG3ODMdInWKUZfj1YT/35iEW PLy81KlxHmrQWYIgBRllObBjYBF1SVGWSlhXkago4R4ClKLcjNLUOVfMYpzMCoJ86aBTOHJzC uB2/QK6AgmoCPmzAA7oiQRISXVwNh0T9cu41S57tPTL2X5+c/6i4du87t24sWisCktncY31+e uXLZ6enrD7Kv37v+1n3Q0ucBFdtPLGy69q01y+RJvcsfzndwXvDr2/Yojh854PjOpitr9jOmX t5tESVFCbWZy6oalJ7X/WF8OelTH4cp1Z1mV5oPuc/++Tr8dceXoBtPAA873Hs1SYinOSDTUY i4qTgQAml5cl6UCAAA= X-Env-Sender: prvs=3711c57a7=sergey.dyasli@citrix.com X-Msg-Ref: server-5.tower-27.messagelabs.com!1500904069!103109264!1 X-Originating-IP: [66.165.176.89] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni44OSA9PiAyMDMwMDc=\n, received_headers: No Received headers X-StarScan-Received: X-StarScan-Version: 9.4.25; banners=-,-,- X-VirusChecked: Checked Received: (qmail 9981 invoked from network); 24 Jul 2017 13:47:50 -0000 Received: from smtp.citrix.com (HELO SMTP.CITRIX.COM) (66.165.176.89) by server-5.tower-27.messagelabs.com with RC4-SHA encrypted SMTP; 24 Jul 2017 13:47:50 -0000 X-IronPort-AV: E=Sophos;i="5.40,407,1496102400"; d="scan'208";a="432696062" From: Sergey Dyasli To: Date: Mon, 24 Jul 2017 14:47:42 +0100 Message-ID: <20170724134745.4787-3-sergey.dyasli@citrix.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170724134745.4787-1-sergey.dyasli@citrix.com> References: <20170724134745.4787-1-sergey.dyasli@citrix.com> MIME-Version: 1.0 Cc: Andrew Cooper , Kevin Tian , Jan Beulich , Jun Nakajima , Sergey Dyasli Subject: [Xen-devel] [PATCH v2 2/5] x86/vmx: add raw_vmx_msr_policy X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add calculate_vmx_raw_policy() which fills the raw_vmx_msr_policy object (the actual contents of H/W VMX MSRs) on the boot CPU. On secondary CPUs, this function checks that contents of VMX MSRs match the boot CPU's contents. Remove lesser version of same-contents-check from vmx_init_vmcs_config(). Signed-off-by: Sergey Dyasli --- v1 --> v2: - calculate_raw_policy() is renamed to calculate_vmx_raw_policy() to avoid clash with the same-name function in cpuid.c - Declaration of calculate_vmx_raw_policy() is removed from vmx.c and added to vmcs.h - msr variable is now unsigned in calculate_vmx_raw_policy() - "\n" moved to the same line as the printk format string - Replaced magic constants for available bitmap with gen_vmx_msr_mask() - get_vmx_msr_ptr() and get_vmx_msr_val() helpers are used instead of accessing MSR array directly xen/arch/x86/hvm/vmx/vmcs.c | 134 +++++++++++++++++++++---------------- xen/arch/x86/hvm/vmx/vmx.c | 2 + xen/include/asm-x86/hvm/vmx/vmcs.h | 3 + 3 files changed, 82 insertions(+), 57 deletions(-) diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c index 33715748f0..8070ed21c8 100644 --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -144,6 +144,8 @@ static void __init vmx_display_features(void) printk(" - none\n"); } +struct vmx_msr_policy __read_mostly raw_vmx_msr_policy; + bool vmx_msr_available(const struct vmx_msr_policy *p, uint32_t msr) { if ( msr < MSR_IA32_VMX_BASIC || msr > MSR_IA32_VMX_LAST ) @@ -178,6 +180,78 @@ uint32_t gen_vmx_msr_mask(uint32_t start_msr, uint32_t end_msr) (start_msr - MSR_IA32_VMX_BASIC); } +int calculate_vmx_raw_policy(bool bsp) +{ + struct vmx_msr_policy policy; + struct vmx_msr_policy *p = &policy; + unsigned int msr; + + /* Raw policy is filled only on boot CPU */ + if ( bsp ) + p = &raw_vmx_msr_policy; + else + memset(&policy, 0, sizeof(policy)); + + p->available = gen_vmx_msr_mask(MSR_IA32_VMX_BASIC, MSR_IA32_VMX_VMCS_ENUM); + for ( msr = MSR_IA32_VMX_BASIC; msr <= MSR_IA32_VMX_VMCS_ENUM; msr++ ) + rdmsrl(msr, *get_vmx_msr_ptr(p, msr)); + + if ( p->basic.default1_zero ) + { + p->available |= gen_vmx_msr_mask(MSR_IA32_VMX_TRUE_PINBASED_CTLS, + MSR_IA32_VMX_TRUE_ENTRY_CTLS); + for ( msr = MSR_IA32_VMX_TRUE_PINBASED_CTLS; + msr <= MSR_IA32_VMX_TRUE_ENTRY_CTLS; msr++ ) + rdmsrl(msr, *get_vmx_msr_ptr(p, msr)); + } + + if ( p->procbased_ctls.allowed_1.activate_secondary_controls ) + { + p->available |= gen_vmx_msr_mask(MSR_IA32_VMX_PROCBASED_CTLS2, + MSR_IA32_VMX_PROCBASED_CTLS2); + msr = MSR_IA32_VMX_PROCBASED_CTLS2; + rdmsrl(msr, *get_vmx_msr_ptr(p, msr)); + + if ( p->procbased_ctls2.allowed_1.enable_ept || + p->procbased_ctls2.allowed_1.enable_vpid ) + { + p->available |= gen_vmx_msr_mask(MSR_IA32_VMX_EPT_VPID_CAP, + MSR_IA32_VMX_EPT_VPID_CAP); + msr = MSR_IA32_VMX_EPT_VPID_CAP; + rdmsrl(msr, *get_vmx_msr_ptr(p, msr)); + } + + if ( p->procbased_ctls2.allowed_1.enable_vm_functions ) + { + p->available |= gen_vmx_msr_mask(MSR_IA32_VMX_VMFUNC, + MSR_IA32_VMX_VMFUNC); + msr = MSR_IA32_VMX_VMFUNC; + rdmsrl(msr, *get_vmx_msr_ptr(p, msr)); + } + } + + /* Check that secondary CPUs have exactly the same bits in VMX MSRs */ + if ( !bsp && memcmp(p, &raw_vmx_msr_policy, sizeof(*p)) != 0 ) + { + for ( msr = MSR_IA32_VMX_BASIC; msr <= MSR_IA32_VMX_LAST; msr++ ) + { + if ( get_vmx_msr_val(p, msr) != + get_vmx_msr_val(&raw_vmx_msr_policy, msr) ) + { + printk("VMX msr %#x: saw 0x%016"PRIx64" expected 0x%016"PRIx64"\n", + msr, get_vmx_msr_val(p, msr), + get_vmx_msr_val(&raw_vmx_msr_policy, msr)); + } + } + + printk("VMX: Capabilities fatally differ between CPU%d and boot CPU\n", + smp_processor_id()); + return -EINVAL; + } + + return 0; +} + static u32 adjust_vmx_controls( const char *name, u32 ctl_min, u32 ctl_opt, u32 msr, bool_t *mismatch) { @@ -199,13 +273,6 @@ static u32 adjust_vmx_controls( return ctl; } -static bool_t cap_check(const char *name, u32 expected, u32 saw) -{ - if ( saw != expected ) - printk("VMX %s: saw %#x expected %#x\n", name, saw, expected); - return saw != expected; -} - static int vmx_init_vmcs_config(void) { u32 vmx_basic_msr_low, vmx_basic_msr_high, min, opt; @@ -438,56 +505,6 @@ static int vmx_init_vmcs_config(void) return -EINVAL; } } - else - { - /* Globals are already initialised: re-check them. */ - mismatch |= cap_check( - "VMCS revision ID", - vmcs_revision_id, vmx_basic_msr_low & VMX_BASIC_REVISION_MASK); - mismatch |= cap_check( - "Pin-Based Exec Control", - vmx_pin_based_exec_control, _vmx_pin_based_exec_control); - mismatch |= cap_check( - "CPU-Based Exec Control", - vmx_cpu_based_exec_control, _vmx_cpu_based_exec_control); - mismatch |= cap_check( - "Secondary Exec Control", - vmx_secondary_exec_control, _vmx_secondary_exec_control); - mismatch |= cap_check( - "VMExit Control", - vmx_vmexit_control, _vmx_vmexit_control); - mismatch |= cap_check( - "VMEntry Control", - vmx_vmentry_control, _vmx_vmentry_control); - mismatch |= cap_check( - "EPT and VPID Capability", - vmx_ept_vpid_cap, _vmx_ept_vpid_cap); - mismatch |= cap_check( - "VMFUNC Capability", - vmx_vmfunc, _vmx_vmfunc); - if ( cpu_has_vmx_ins_outs_instr_info != - !!(vmx_basic_msr_high & (VMX_BASIC_INS_OUT_INFO >> 32)) ) - { - printk("VMX INS/OUTS Instruction Info: saw %d expected %d\n", - !!(vmx_basic_msr_high & (VMX_BASIC_INS_OUT_INFO >> 32)), - cpu_has_vmx_ins_outs_instr_info); - mismatch = 1; - } - if ( (vmx_basic_msr_high & (VMX_BASIC_VMCS_SIZE_MASK >> 32)) != - ((vmx_basic_msr & VMX_BASIC_VMCS_SIZE_MASK) >> 32) ) - { - printk("VMX: CPU%d unexpected VMCS size %Lu\n", - smp_processor_id(), - vmx_basic_msr_high & (VMX_BASIC_VMCS_SIZE_MASK >> 32)); - mismatch = 1; - } - if ( mismatch ) - { - printk("VMX: Capabilities fatally differ between CPU%d and CPU0\n", - smp_processor_id()); - return -EINVAL; - } - } /* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */ if ( vmx_basic_msr_high & (VMX_BASIC_32BIT_ADDRESSES >> 32) ) @@ -637,6 +654,9 @@ int vmx_cpu_up(void) BUG_ON(!(read_cr4() & X86_CR4_VMXE)); + if ( (rc = calculate_vmx_raw_policy(false)) != 0 ) + return rc; + /* * Ensure the current processor operating mode meets * the requred CRO fixed bits in VMX operation. diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 69ce3aae25..ce6537d96f 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -2440,6 +2440,8 @@ const struct hvm_function_table * __init start_vmx(void) { set_in_cr4(X86_CR4_VMXE); + calculate_vmx_raw_policy(true); + if ( vmx_cpu_up() ) { printk("VMX: failed to initialise.\n"); diff --git a/xen/include/asm-x86/hvm/vmx/vmcs.h b/xen/include/asm-x86/hvm/vmx/vmcs.h index c6ff3fe0b8..25f84308dc 100644 --- a/xen/include/asm-x86/hvm/vmx/vmcs.h +++ b/xen/include/asm-x86/hvm/vmx/vmcs.h @@ -942,6 +942,9 @@ uint64_t get_vmx_msr_val(const struct vmx_msr_policy *p, uint32_t msr); uint64_t *get_vmx_msr_ptr(struct vmx_msr_policy *p, uint32_t msr); uint32_t gen_vmx_msr_mask(uint32_t start_msr, uint32_t end_msr); +extern struct vmx_msr_policy raw_vmx_msr_policy; +int calculate_vmx_raw_policy(bool bsp); + #endif /* ASM_X86_HVM_VMX_VMCS_H__ */ /*