From patchwork Wed Aug 9 08:20:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergej Proskurin X-Patchwork-Id: 9889829 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A7C4860384 for ; Wed, 9 Aug 2017 08:23:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9701E28A30 for ; Wed, 9 Aug 2017 08:23:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8BCF928A37; Wed, 9 Aug 2017 08:23:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 13D4028A30 for ; Wed, 9 Aug 2017 08:23:41 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dfMEz-0006Mn-DH; Wed, 09 Aug 2017 08:21:21 +0000 Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dfMEy-0006LK-4t for xen-devel@lists.xenproject.org; Wed, 09 Aug 2017 08:21:20 +0000 Received: from [193.109.254.147] by server-3.bemta-6.messagelabs.com id 94/CD-03044-FF5CA895; Wed, 09 Aug 2017 08:21:19 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrMLMWRWlGSWpSXmKPExsXSPJ+BQ/ff0a5 Ig7bfJhbft0xmcmD0OPzhCksAYxRrZl5SfkUCa8ayXo+CpboV3a1vWBoYe+W6GLk4hAQ2Mkoc PHmZHcLZxCjxc+U2ti5GTg42AQOJKa9XsoLYIgJKEvdWTWYCKWIWaGKUuNf4AKxIWCBGYvHhv WA2i4CqxOLWXkYQm1fAWuLBpucsILaEgLzExN5pYHFOARuJHXcgbCGgmmnHzjFPYORewMiwil GjOLWoLLVI19hIL6koMz2jJDcxM0fX0MBMLze1uDgxPTUnMalYLzk/dxMj0MMMQLCD8fS6wEO MkhxMSqK8m7Q7I4X4kvJTKjMSizPii0pzUosPMcpwcChJ8HId6YoUEixKTU+tSMvMAYYaTFqC g0dJhFcNJM1bXJCYW5yZDpE6xajL8WrC/29MQix5+XmpUuK8FiBFAiBFGaV5cCNgYX+JUVZKm JcR6CghnoLUotzMElT5V4ziHIxKwrwNIFN4MvNK4Da9AjqCCeiICN9OkCNKEhFSUg2MwcXuof t39XT++DXnnPEPkUrF2C8vag0ZWFrUtf0mLY8PeMZ/5fJlwerdBsz1V95trjjw51xyyMvCqu6 Lgje38r08WmiStmp9RuBzrYCuctVZG+W+zG8MYeNqOpLhdyve6+eKDZatwlbcT/JOu7aHLP7X I37l6LX5lRL8lq1xE1k+BN36s9ZeiaU4I9FQi7moOBEAr1Ui0nYCAAA= X-Env-Sender: proskurin@sec.in.tum.de X-Msg-Ref: server-13.tower-27.messagelabs.com!1502266878!101459742!1 X-Originating-IP: [131.159.0.8] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 9.4.45; banners=-,-,- X-VirusChecked: Checked Received: (qmail 24256 invoked from network); 9 Aug 2017 08:21:18 -0000 Received: from mail-out1.informatik.tu-muenchen.de (HELO mail-out1.informatik.tu-muenchen.de) (131.159.0.8) by server-13.tower-27.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 9 Aug 2017 08:21:18 -0000 Received: from files.sec.in.tum.de (files.sec.in.tum.de [131.159.50.1]) by services.sec.in.tum.de (Postfix) with ESMTP id BC70B10DD29F4; Wed, 9 Aug 2017 10:21:06 +0200 (CEST) Received: from thanatos.sec.in.tum.de (thanatos.sec.in.tum.de [131.159.50.57]) by files.sec.in.tum.de (Postfix) with ESMTP id ADD641F048; Wed, 9 Aug 2017 10:21:06 +0200 (CEST) From: Sergej Proskurin To: xen-devel@lists.xenproject.org Date: Wed, 9 Aug 2017 10:20:27 +0200 Message-Id: <20170809082038.3236-3-proskurin@sec.in.tum.de> X-Mailer: git-send-email 2.13.3 In-Reply-To: <20170809082038.3236-1-proskurin@sec.in.tum.de> References: <20170809082038.3236-1-proskurin@sec.in.tum.de> Cc: Sergej Proskurin , Julien Grall , Stefano Stabellini Subject: [Xen-devel] [PATCH v8 02/13] arm/mem_access: Add defines supporting PTs with varying page sizes X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP AArch64 supports pages with different (4K, 16K, and 64K) sizes. To enable guest page table walks for various configurations, this commit extends the defines and helpers of the current implementation. Signed-off-by: Sergej Proskurin Reviewed-by: Julien Grall --- Cc: Stefano Stabellini Cc: Julien Grall --- v3: Eliminate redundant macro definitions by introducing generic macros. v4: Replace existing macros with ones that generate static inline helpers as to ease the readability of the code. Move the introduced code into lpae.h v5: Remove PAGE_SHIFT_* defines from lpae.h as we import them now from the header xen/lib.h. Remove *_guest_table_offset macros as to reduce the number of exported macros which are only used once. Instead, use the associated functionality directly within the GUEST_TABLE_OFFSET_HELPERS. Add comment in GUEST_TABLE_OFFSET_HELPERS stating that a page table with 64K page size granularity does not have a zeroeth lookup level. Add #undefs for GUEST_TABLE_OFFSET and GUEST_TABLE_OFFSET_HELPERS. Remove CONFIG_ARM_64 #defines. v6: Rename *_guest_table_offset_* helpers to *_table_offset_* as they are sufficiently generic to be applied not only to the guest's page table walks. Change the type of the parameter and return value of the *_table_offset_* helpers from vaddr_t to paddr_t to enable applying these helpers also for other purposes such as computation of IPA offsets in second stage translation tables. v7: Clarify comments in the code and commit message to address AArch64 directly instead of ARMv8 in general. Rename remaining GUEST_TABLE_* macros into TABLE_* macros, to be consistent with *_table_offset_* helpers. Added Reviewed-by Julien Grall. --- xen/include/asm-arm/lpae.h | 61 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/xen/include/asm-arm/lpae.h b/xen/include/asm-arm/lpae.h index a62b118630..efec493313 100644 --- a/xen/include/asm-arm/lpae.h +++ b/xen/include/asm-arm/lpae.h @@ -3,6 +3,8 @@ #ifndef __ASSEMBLY__ +#include + /* * WARNING! Unlike the x86 pagetable code, where l1 is the lowest level and * l4 is the root of the trie, the ARM pagetables follow ARM's documentation: @@ -151,6 +153,65 @@ static inline bool lpae_is_superpage(lpae_t pte, unsigned int level) return (level < 3) && lpae_mapping(pte); } +/* + * AArch64 supports pages with different sizes (4K, 16K, and 64K). To enable + * page table walks for various configurations, the following helpers enable + * walking the translation table with varying page size granularities. + */ + +#define LPAE_SHIFT_4K (9) +#define LPAE_SHIFT_16K (11) +#define LPAE_SHIFT_64K (13) + +#define lpae_entries(gran) (_AC(1,U) << LPAE_SHIFT_##gran) +#define lpae_entry_mask(gran) (lpae_entries(gran) - 1) + +#define third_shift(gran) (PAGE_SHIFT_##gran) +#define third_size(gran) ((paddr_t)1 << third_shift(gran)) + +#define second_shift(gran) (third_shift(gran) + LPAE_SHIFT_##gran) +#define second_size(gran) ((paddr_t)1 << second_shift(gran)) + +#define first_shift(gran) (second_shift(gran) + LPAE_SHIFT_##gran) +#define first_size(gran) ((paddr_t)1 << first_shift(gran)) + +/* Note that there is no zeroeth lookup level with a 64K granule size. */ +#define zeroeth_shift(gran) (first_shift(gran) + LPAE_SHIFT_##gran) +#define zeroeth_size(gran) ((paddr_t)1 << zeroeth_shift(gran)) + +#define TABLE_OFFSET(offs, gran) (offs & lpae_entry_mask(gran)) +#define TABLE_OFFSET_HELPERS(gran) \ +static inline paddr_t third_table_offset_##gran##K(paddr_t va) \ +{ \ + return TABLE_OFFSET((va >> third_shift(gran##K)), gran##K); \ +} \ + \ +static inline paddr_t second_table_offset_##gran##K(paddr_t va) \ +{ \ + return TABLE_OFFSET((va >> second_shift(gran##K)), gran##K); \ +} \ + \ +static inline paddr_t first_table_offset_##gran##K(paddr_t va) \ +{ \ + return TABLE_OFFSET((va >> first_shift(gran##K)), gran##K); \ +} \ + \ +static inline paddr_t zeroeth_table_offset_##gran##K(paddr_t va) \ +{ \ + /* Note that there is no zeroeth lookup level with 64K granule sizes. */\ + if ( gran == 64 ) \ + return 0; \ + else \ + return TABLE_OFFSET((va >> zeroeth_shift(gran##K)), gran##K); \ +} \ + +TABLE_OFFSET_HELPERS(4); +TABLE_OFFSET_HELPERS(16); +TABLE_OFFSET_HELPERS(64); + +#undef TABLE_OFFSET +#undef TABLE_OFFSET_HELPERS + #endif /* __ASSEMBLY__ */ /*