From patchwork Thu Aug 24 15:07:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 9920449 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C2355603FA for ; Thu, 24 Aug 2017 15:09:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B129228BAD for ; Thu, 24 Aug 2017 15:09:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A5D9F28BBF; Thu, 24 Aug 2017 15:09:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7E4D528BB8 for ; Thu, 24 Aug 2017 15:09:47 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dktj9-0007WN-3I; Thu, 24 Aug 2017 15:07:23 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dktj7-0007W5-MR for xen-devel@lists.xenproject.org; Thu, 24 Aug 2017 15:07:21 +0000 Received: from [85.158.139.211] by server-3.bemta-5.messagelabs.com id 69/CD-02033-8ABEE995; Thu, 24 Aug 2017 15:07:20 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprGIsWRWlGSWpSXmKPExsXitHRDpO6K1/M iDTa+kLL4vmUykwOjx+EPV1gCGKNYM/OS8isSWDPuvTYsWCtbsf7CQ/YGxkuiXYwcHBIC/hLL 59h0MXJysAnoSFycu5MNJCwioCJxe68BiMksUC4x40Y8iCkMVDxrtz5IMYuAqkTfrD2MIDavg KXE3wdLmUBsCQE9ibcTXzCClHMKWEl82ugMEhYCKvlwaC4zRLmgxMmZT1hAbGYBTYnW7b/ZIW x5ieats5kh6hUl+uc9YJvAyDcLScssJC2zkLQsYGRexahenFpUllqka6GXVJSZnlGSm5iZo2t oYKqXm1pcnJiempOYVKyXnJ+7iREYXgxAsIPxYLPzIUZJDiYlUd7lL+ZFCvEl5adUZiQWZ8QX leakFh9ilOHgUJLgtX0FlBMsSk1PrUjLzAEGOkxagoNHSYQ3FyTNW1yQmFucmQ6ROsWoKCXO6 wmSEABJZJTmwbXBousSo6yUMC8j0CFCPAWpRbmZJajyrxjFORiVhHlDQabwZOaVwE1/BbSYCW jxpBNzQBaXJCKkpBoYK3Ren2+60BhpmXCD48Bj8UM2nH/e9jlVyZhHnvqkJahx894ytoStagK z0j+w1v9zXjvxe/35gOAzF69+tC5kC+iu6PGpeLAnu8Nw0nGbO7IlJ75O/DzbQ6vsm5va3EMV mj35cydW+CV1enyfOdvHMSzsKEPRbct9MV1zT+61EvzCHxEeeD1ciaU4I9FQi7moOBEAAyR1N 6kCAAA= X-Env-Sender: prvs=402c228e5=roger.pau@citrix.com X-Msg-Ref: server-4.tower-206.messagelabs.com!1503587238!108677120!1 X-Originating-IP: [66.165.176.89] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni44OSA9PiAyMDMwMDc=\n, received_headers: No Received headers X-StarScan-Received: X-StarScan-Version: 9.4.45; banners=-,-,- X-VirusChecked: Checked Received: (qmail 33470 invoked from network); 24 Aug 2017 15:07:20 -0000 Received: from smtp.citrix.com (HELO SMTP.CITRIX.COM) (66.165.176.89) by server-4.tower-206.messagelabs.com with RC4-SHA encrypted SMTP; 24 Aug 2017 15:07:20 -0000 X-IronPort-AV: E=Sophos;i="5.41,421,1498521600"; d="scan'208";a="436745188" From: Roger Pau Monne To: Date: Thu, 24 Aug 2017 16:07:02 +0100 Message-ID: <20170824150703.79731-2-roger.pau@citrix.com> X-Mailer: git-send-email 2.11.0 (Apple Git-81) In-Reply-To: <20170824150703.79731-1-roger.pau@citrix.com> References: <20170824150703.79731-1-roger.pau@citrix.com> MIME-Version: 1.0 Cc: Andrew Cooper , Jan Beulich , Roger Pau Monne Subject: [Xen-devel] [PATCH XEN v4] x86/pt: add a MSI unmask flag to XEN_DOMCTL_bind_pt_irq X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP The flag is part of the gflags, and should be used to request the unmask of a MSI interrupt once it's bound. This is required for the device model in order to be capable of binding MSIX interrupts that have the entry mask bit already unset at bind time. Without this fix the interrupts would be left masked. Note that this commit introduces a change to the domctl, which requires a bump of the interface version. This is done done here because the interface version has already been bumped in this release cycle. Signed-off-by: Roger Pau Monné Reported by: Andreas Kinzler Reviewed-by: Jan Beulich --- Cc: Jan Beulich Cc: Andrew Cooper --- Changes since v2: - Use _irqrestore. Changes since v1: - Use pirq_spin_lock_irq_desc. --- xen/drivers/passthrough/io.c | 22 +++++++++++++++++++--- xen/include/asm-x86/hvm/irq.h | 1 + 2 files changed, 20 insertions(+), 3 deletions(-) diff --git a/xen/drivers/passthrough/io.c b/xen/drivers/passthrough/io.c index 19a21bf85a..1d260bd7ba 100644 --- a/xen/drivers/passthrough/io.c +++ b/xen/drivers/passthrough/io.c @@ -342,13 +342,14 @@ int pt_irq_create_bind( uint8_t dest, dest_mode, delivery_mode; int dest_vcpu_id; const struct vcpu *vcpu; + uint32_t gflags = pt_irq_bind->u.msi.gflags & ~VMSI_UNMASKED; if ( !(pirq_dpci->flags & HVM_IRQ_DPCI_MAPPED) ) { pirq_dpci->flags = HVM_IRQ_DPCI_MAPPED | HVM_IRQ_DPCI_MACH_MSI | HVM_IRQ_DPCI_GUEST_MSI; pirq_dpci->gmsi.gvec = pt_irq_bind->u.msi.gvec; - pirq_dpci->gmsi.gflags = pt_irq_bind->u.msi.gflags; + pirq_dpci->gmsi.gflags = gflags; /* * 'pt_irq_create_bind' can be called after 'pt_irq_destroy_bind'. * The 'pirq_cleanup_check' which would free the structure is only @@ -401,13 +402,13 @@ int pt_irq_create_bind( /* If pirq is already mapped as vmsi, update guest data/addr. */ if ( pirq_dpci->gmsi.gvec != pt_irq_bind->u.msi.gvec || - pirq_dpci->gmsi.gflags != pt_irq_bind->u.msi.gflags ) + pirq_dpci->gmsi.gflags != gflags ) { /* Directly clear pending EOIs before enabling new MSI info. */ pirq_guest_eoi(info); pirq_dpci->gmsi.gvec = pt_irq_bind->u.msi.gvec; - pirq_dpci->gmsi.gflags = pt_irq_bind->u.msi.gflags; + pirq_dpci->gmsi.gflags = gflags; } } /* Calculate dest_vcpu_id for MSI-type pirq migration. */ @@ -438,6 +439,21 @@ int pt_irq_create_bind( pi_update_irte(vcpu ? &vcpu->arch.hvm_vmx.pi_desc : NULL, info, pirq_dpci->gmsi.gvec); + if ( pt_irq_bind->u.msi.gflags & VMSI_UNMASKED ) + { + unsigned long flags; + struct irq_desc *desc = pirq_spin_lock_irq_desc(info, &flags); + + if ( !desc ) + { + pt_irq_destroy_bind(d, pt_irq_bind); + return -EINVAL; + } + + guest_mask_msi_irq(desc, false); + spin_unlock_irqrestore(&desc->lock, flags); + } + break; } diff --git a/xen/include/asm-x86/hvm/irq.h b/xen/include/asm-x86/hvm/irq.h index 106dc19613..9546c24879 100644 --- a/xen/include/asm-x86/hvm/irq.h +++ b/xen/include/asm-x86/hvm/irq.h @@ -136,6 +136,7 @@ struct dev_intx_gsi_link { #define VMSI_DM_MASK 0x200 #define VMSI_DELIV_MASK 0x7000 #define VMSI_TRIG_MODE 0x8000 +#define VMSI_UNMASKED 0x10000 #define GFLAGS_SHIFT_RH 8 #define GFLAGS_SHIFT_DELIV_MODE 12