From patchwork Wed Aug 30 10:34:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergey Dyasli X-Patchwork-Id: 9929277 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D88DB60309 for ; Wed, 30 Aug 2017 10:37:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E229828421 for ; Wed, 30 Aug 2017 10:37:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D6FF92847B; Wed, 30 Aug 2017 10:37:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6BB2828421 for ; Wed, 30 Aug 2017 10:37:09 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dn0KZ-00011W-Sq; Wed, 30 Aug 2017 10:34:43 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dn0KY-000109-2g for xen-devel@lists.xen.org; Wed, 30 Aug 2017 10:34:42 +0000 Received: from [85.158.137.68] by server-2.bemta-3.messagelabs.com id 02/FC-02041-1C496A95; Wed, 30 Aug 2017 10:34:41 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmplkeJIrShJLcpLzFFi42JxWrohUnf/lGW RBvOP61ss+biYxYHR4+ju30wBjFGsmXlJ+RUJrBlNJ/czFxxXrZje/5+1gfGVbBcjB4eEgL/E v1/8XYycHGwCehIbZ79iArFFBGQlVnfNYe9i5OJgFtjCLDGv8zkzSEJYwFHi6rf3bCA2i4Cqx JUrV1lAbF4BG4m5S5sYQWwJAXmJXW0XWUFsTgFbiWO/D4LFhYBq+l8vYIewVSVev9gF1SsocX LmEzCbWUBC4uCLF8wTGHlnIUnNQpJawMi0ilGjOLWoLLVI18hIL6koMz2jJDcxM0fX0MBYLze 1uDgxPTUnMalYLzk/dxMjMHjqGRgYdzBOPeF3iFGSg0lJlDdm0rJIIb6k/JTKjMTijPii0pzU 4kOMMhwcShK82yYC5QSLUtNTK9Iyc4BhDJOW4OBREuG9B9LKW1yQmFucmQ6ROsWoKCXOWzYZK CEAksgozYNrg8XOJUZZKWFeRgYGBiGegtSi3MwSVPlXjOIcjErCvLkgU3gy80rgpr8CWswEtD jWaynI4pJEhJRUA+NyrX6xu0lXwzcy/Vt9MuqnZRVT4I8FOhUOJnJ3a7YHs5mIGe0Vi5T9Z91 8St17cazyvXds4cdf+Gvcy+neXXRjUVSdyU3Jx2eK27r+m+98q9v1Q6B6ivsd9bPbZsz/N40p 8mzjCt7bB5XaEpe/Eg/rvNXtHJy3erbqpD0zF/52uiwtfupAw1klluKMREMt5qLiRADCsfyzm AIAAA== X-Env-Sender: prvs=408f3fb1e=sergey.dyasli@citrix.com X-Msg-Ref: server-16.tower-31.messagelabs.com!1504089278!104672979!1 X-Originating-IP: [66.165.176.89] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni44OSA9PiAyMDMwMDc=\n, received_headers: No Received headers X-StarScan-Received: X-StarScan-Version: 9.4.45; banners=-,-,- X-VirusChecked: Checked Received: (qmail 52132 invoked from network); 30 Aug 2017 10:34:39 -0000 Received: from smtp.citrix.com (HELO SMTP.CITRIX.COM) (66.165.176.89) by server-16.tower-31.messagelabs.com with RC4-SHA encrypted SMTP; 30 Aug 2017 10:34:39 -0000 X-IronPort-AV: E=Sophos;i="5.41,448,1498521600"; d="scan'208";a="437433971" From: Sergey Dyasli To: Date: Wed, 30 Aug 2017 11:34:30 +0100 Message-ID: <20170830103433.6605-3-sergey.dyasli@citrix.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170830103433.6605-1-sergey.dyasli@citrix.com> References: <20170830103433.6605-1-sergey.dyasli@citrix.com> MIME-Version: 1.0 Cc: Sergey Dyasli , Kevin Tian , Stefano Stabellini , Wei Liu , Jun Nakajima , George Dunlap , Andrew Cooper , Ian Jackson , Tim Deegan , Jan Beulich Subject: [Xen-devel] [PATCH v1 2/5] x86/msr: introduce struct msr_vcpu_policy X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP The new structure contains information about guest's MSRs that are unique to each vCPU. It starts with only 1 MSR: MSR_INTEL_MISC_FEATURES_ENABLES Which currently has only 1 usable bit: cpuid_faulting. Add 2 global policy objects: hvm_max and pv_max that are inited during boot up. Availability of MSR_INTEL_MISC_FEATURES_ENABLES depends on availability of MSR_INTEL_PLATFORM_INFO. Add init_vcpu_msr_policy() which sets initial MSR policy for every vCPU during domain creation with a special case for Dom0. Signed-off-by: Sergey Dyasli Reviewed-by: Kevin Tian --- xen/arch/x86/domain.c | 18 ++++++++++++++++-- xen/arch/x86/msr.c | 33 +++++++++++++++++++++++++++++++++ xen/include/asm-x86/domain.h | 2 ++ xen/include/asm-x86/msr.h | 11 +++++++++++ 4 files changed, 62 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 620666b33a..1667d2ad57 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -344,13 +344,27 @@ int vcpu_initialise(struct vcpu *v) /* Idle domain */ v->arch.cr3 = __pa(idle_pg_table); rc = 0; + v->arch.msr = ZERO_BLOCK_PTR; /* Catch stray misuses */ } if ( rc ) - vcpu_destroy_fpu(v); - else if ( !is_idle_domain(v->domain) ) + goto fail; + + if ( !is_idle_domain(v->domain) ) + { vpmu_initialise(v); + if ( (rc = init_vcpu_msr_policy(v)) ) + goto fail; + } + + return rc; + + fail: + vcpu_destroy_fpu(v); + xfree(v->arch.msr); + v->arch.msr = NULL; + return rc; } diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index eac50ec897..b5ad97d3c8 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -27,9 +27,13 @@ struct msr_domain_policy __read_mostly hvm_max_msr_domain_policy, __read_mostly pv_max_msr_domain_policy; +struct msr_vcpu_policy __read_mostly hvm_max_msr_vcpu_policy, + __read_mostly pv_max_msr_vcpu_policy; + static void __init calculate_hvm_max_policy(void) { struct msr_domain_policy *dp = &hvm_max_msr_domain_policy; + struct msr_vcpu_policy *vp = &hvm_max_msr_vcpu_policy; if ( !hvm_enabled ) return; @@ -40,11 +44,15 @@ static void __init calculate_hvm_max_policy(void) dp->plaform_info.available = true; dp->plaform_info.cpuid_faulting = true; } + + /* 0x00000140 MSR_INTEL_MISC_FEATURES_ENABLES */ + vp->misc_features_enables.available = dp->plaform_info.available; } static void __init calculate_pv_max_policy(void) { struct msr_domain_policy *dp = &pv_max_msr_domain_policy; + struct msr_vcpu_policy *vp = &pv_max_msr_vcpu_policy; /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ if ( cpu_has_cpuid_faulting ) @@ -52,6 +60,9 @@ static void __init calculate_pv_max_policy(void) dp->plaform_info.available = true; dp->plaform_info.cpuid_faulting = true; } + + /* 0x00000140 MSR_INTEL_MISC_FEATURES_ENABLES */ + vp->misc_features_enables.available = dp->plaform_info.available; } void __init init_guest_msr_policy(void) @@ -84,6 +95,28 @@ int init_domain_msr_policy(struct domain *d) return 0; } +int init_vcpu_msr_policy(struct vcpu *v) +{ + struct domain *d = v->domain; + struct msr_vcpu_policy *vp; + + vp = xmalloc(struct msr_vcpu_policy); + + if ( !vp ) + return -ENOMEM; + + *vp = is_pv_domain(d) ? pv_max_msr_vcpu_policy : + hvm_max_msr_vcpu_policy; + + /* See comment in intel_ctxt_switch_levelling() */ + if ( is_control_domain(d) ) + vp->misc_features_enables.available = false; + + v->arch.msr = vp; + + return 0; +} + /* * Local variables: * mode: C diff --git a/xen/include/asm-x86/domain.h b/xen/include/asm-x86/domain.h index f08ede3a05..866a03b508 100644 --- a/xen/include/asm-x86/domain.h +++ b/xen/include/asm-x86/domain.h @@ -575,6 +575,8 @@ struct arch_vcpu struct arch_vm_event *vm_event; + struct msr_vcpu_policy *msr; + struct { bool next_interrupt_enabled; } monitor; diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h index 5cf7be1821..7c8395b9b3 100644 --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -212,8 +212,19 @@ struct msr_domain_policy } plaform_info; }; +/* MSR policy object for per-vCPU MSRs */ +struct msr_vcpu_policy +{ + /* 0x00000140 MSR_INTEL_MISC_FEATURES_ENABLES */ + struct { + bool available; /* This MSR is non-architectural */ + bool cpuid_faulting; + } misc_features_enables; +}; + void init_guest_msr_policy(void); int init_domain_msr_policy(struct domain *d); +int init_vcpu_msr_policy(struct vcpu *v); #endif /* !__ASSEMBLY__ */