From patchwork Thu Sep 14 12:58:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Liu X-Patchwork-Id: 9953105 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2E94660317 for ; Thu, 14 Sep 2017 13:31:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 27BD528CD3 for ; Thu, 14 Sep 2017 13:31:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1C06328E1A; Thu, 14 Sep 2017 13:31:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 911EA28CD3 for ; Thu, 14 Sep 2017 13:31:06 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dsUCV-0008DD-AU; Thu, 14 Sep 2017 13:29:03 +0000 Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dsUCU-0008CC-04 for xen-devel@lists.xenproject.org; Thu, 14 Sep 2017 13:29:02 +0000 Received: from [85.158.143.35] by server-7.bemta-6.messagelabs.com id C6/16-03610-D148AB95; Thu, 14 Sep 2017 13:29:01 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprEIsWRWlGSWpSXmKPExsXitHSDva5My65 IgwnfbCy+b5nM5MDocfjDFZYAxijWzLyk/IoE1oznEz8yFZwWqdi/6BBrA+Mnvi5GTg4JAX+J zrOn2EFsNgFliZ+dvWwgtoiAnkTTgeeMXYxcHMwCcxglps7tYgRJCAuESzSs3QBmswioSix4f osJxOYVsJQ41XieBWKovMSutousIDYnULzrw0uwGiEBC4neS/vZIWwFiY7px6B6BSVOznwC1s ssICFx8MUL5gmMvLOQpGYhSS1gZFrFqFGcWlSWWqRraKiXVJSZnlGSm5iZo2toYKaXm1pcnJi empOYVKyXnJ+7iREYPgxAsIPx07KAQ4ySHExKorx7dXdGCvEl5adUZiQWZ8QXleakFh9ilOHg UJLgPdu0K1JIsCg1PbUiLTMHGMgwaQkOHiUR3vsgad7igsTc4sx0iNQpRl2Ojpt3/zAJseTl5 6VKifNqNwMVCYAUZZTmwY2ARdUlRlkpYV5GoKOEeApSi3IzS1DlXzGKczAqCfNeBlnFk5lXAr fpFdARTEBHnDm9A+SIkkSElFQD49p77WluAdv3zrh8ofTj19pm3a7roqf6L5gJBh3amDzNU/P 6Amsjo4Upwcyxc7xnWx4O+Fld8VtqWqzhgRPq9n6e93qSdHR89pQu1S3iEr3HnDzvB+uVsulv j789Nrdo+UJWwwkGe15s1f7EKPnvStDvu6fPZv91rK4//nDPrl/h8xNcXNqznZRYijMSDbWYi 4oTAe/wfUalAgAA X-Env-Sender: prvs=423b67c62=wei.liu2@citrix.com X-Msg-Ref: server-10.tower-21.messagelabs.com!1505395739!76223780!1 X-Originating-IP: [66.165.176.63] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni42MyA9PiAzMDYwNDg=\n, received_headers: No Received headers X-StarScan-Received: X-StarScan-Version: 9.4.45; banners=-,-,- X-VirusChecked: Checked Received: (qmail 43870 invoked from network); 14 Sep 2017 13:29:00 -0000 Received: from smtp02.citrix.com (HELO SMTP02.CITRIX.COM) (66.165.176.63) by server-10.tower-21.messagelabs.com with RC4-SHA encrypted SMTP; 14 Sep 2017 13:29:00 -0000 X-IronPort-AV: E=Sophos;i="5.42,393,1500940800"; d="scan'208";a="447841024" From: Wei Liu To: Xen-devel Date: Thu, 14 Sep 2017 13:58:46 +0100 Message-ID: <20170914125852.22129-18-wei.liu2@citrix.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170914125852.22129-1-wei.liu2@citrix.com> References: <20170914125852.22129-1-wei.liu2@citrix.com> MIME-Version: 1.0 Cc: George Dunlap , Andrew Cooper , Wei Liu , Jan Beulich Subject: [Xen-devel] [PATCH v5 17/23] x86/mm: export base_disallow_mask and l1 mask in asm-x86/mm.h X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP The l1 mask needs to stay in x86/mm.c while l{2,3,4} masks are only needed by PV code. Both x86 common mm code and PV mm code use base_disallow_mask and l1 maks. Export base_disallow_mask and l1 mask in asm-x86/mm.h. Signed-off-by: Wei Liu --- xen/arch/x86/mm.c | 12 +----------- xen/include/asm-x86/mm.h | 13 +++++++++++++ 2 files changed, 14 insertions(+), 11 deletions(-) diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index 86c7466fa0..e11aac3b90 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -152,9 +152,7 @@ bool __read_mostly machine_to_phys_mapping_valid; struct rangeset *__read_mostly mmio_ro_ranges; -static uint32_t base_disallow_mask; -/* Global bit is allowed to be set on L1 PTEs. Intended for user mappings. */ -#define L1_DISALLOW_MASK ((base_disallow_mask | _PAGE_GNTTAB) & ~_PAGE_GLOBAL) +uint32_t __read_mostly base_disallow_mask; #define L2_DISALLOW_MASK base_disallow_mask @@ -163,14 +161,6 @@ static uint32_t base_disallow_mask; #define L4_DISALLOW_MASK (base_disallow_mask) -#define l1_disallow_mask(d) \ - ((d != dom_io) && \ - (rangeset_is_empty((d)->iomem_caps) && \ - rangeset_is_empty((d)->arch.ioport_caps) && \ - !has_arch_pdevs(d) && \ - is_pv_domain(d)) ? \ - L1_DISALLOW_MASK : (L1_DISALLOW_MASK & ~PAGE_CACHE_ATTRS)) - static s8 __read_mostly opt_mmio_relax; static int __init parse_mmio_relax(const char *s) diff --git a/xen/include/asm-x86/mm.h b/xen/include/asm-x86/mm.h index 56b2b94195..fbb98e80c6 100644 --- a/xen/include/asm-x86/mm.h +++ b/xen/include/asm-x86/mm.h @@ -612,4 +612,17 @@ static inline bool arch_mfn_in_directmap(unsigned long mfn) return mfn <= (virt_to_mfn(eva - 1) + 1); } +extern uint32_t base_disallow_mask; + +/* Global bit is allowed to be set on L1 PTEs. Intended for user mappings. */ +#define L1_DISALLOW_MASK ((base_disallow_mask | _PAGE_GNTTAB) & ~_PAGE_GLOBAL) + +#define l1_disallow_mask(d) \ + ((d != dom_io) && \ + (rangeset_is_empty((d)->iomem_caps) && \ + rangeset_is_empty((d)->arch.ioport_caps) && \ + !has_arch_pdevs(d) && \ + is_pv_domain(d)) ? \ + L1_DISALLOW_MASK : (L1_DISALLOW_MASK & ~PAGE_CACHE_ATTRS)) + #endif /* __ASM_X86_MM_H__ */