[v3,3/6] x86/msr: read VMX MSRs values into Raw policy

Commit Message

Sergey Dyasli Oct. 13, 2017, 12:35 p.m. UTC

Add calculate_raw_vmx_policy() which fills Raw policy with H/W values
of VMX MSRs. Host policy will contain a copy of these values.

Signed-off-by: Sergey Dyasli <[e-mail]>
---
 xen/arch/x86/msr.c | 77 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 77 insertions(+)

Patch

diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c
index 24029a2ac1..955aba0849 100644
--- a/xen/arch/x86/msr.c
+++ b/xen/arch/x86/msr.c
@@ -32,6 +32,81 @@  struct msr_domain_policy __read_mostly     raw_msr_domain_policy,
 struct msr_vcpu_policy __read_mostly hvm_max_msr_vcpu_policy,
                        __read_mostly  pv_max_msr_vcpu_policy;
 
+static void __init calculate_raw_vmx_policy(struct msr_domain_policy *dp)
+{
+    if ( !cpu_has_vmx )
+        return;
+
+    dp->vmx_basic.available = true;
+    rdmsrl(MSR_IA32_VMX_BASIC, dp->vmx_basic.u.raw);
+
+    dp->vmx_pinbased_ctls.available = true;
+    rdmsrl(MSR_IA32_VMX_PINBASED_CTLS, dp->vmx_pinbased_ctls.u.raw);
+
+    dp->vmx_procbased_ctls.available = true;
+    rdmsrl(MSR_IA32_VMX_PROCBASED_CTLS, dp->vmx_procbased_ctls.u.raw);
+
+    dp->vmx_exit_ctls.available = true;
+    rdmsrl(MSR_IA32_VMX_EXIT_CTLS, dp->vmx_exit_ctls.u.raw);
+
+    dp->vmx_entry_ctls.available = true;
+    rdmsrl(MSR_IA32_VMX_ENTRY_CTLS, dp->vmx_entry_ctls.u.raw);
+
+    dp->vmx_misc.available = true;
+    rdmsrl(MSR_IA32_VMX_MISC, dp->vmx_misc.u.raw);
+
+    dp->vmx_cr0_fixed0.available = true;
+    rdmsrl(MSR_IA32_VMX_CR0_FIXED0, dp->vmx_cr0_fixed0.u.raw);
+
+    dp->vmx_cr0_fixed1.available = true;
+    rdmsrl(MSR_IA32_VMX_CR0_FIXED1, dp->vmx_cr0_fixed1.u.raw);
+
+    dp->vmx_cr4_fixed0.available = true;
+    rdmsrl(MSR_IA32_VMX_CR4_FIXED0, dp->vmx_cr4_fixed0.u.raw);
+
+    dp->vmx_cr4_fixed1.available = true;
+    rdmsrl(MSR_IA32_VMX_CR4_FIXED1, dp->vmx_cr4_fixed1.u.raw);
+
+    dp->vmx_vmcs_enum.available = true;
+    rdmsrl(MSR_IA32_VMX_VMCS_ENUM, dp->vmx_vmcs_enum.u.raw);
+
+    if ( dp->vmx_procbased_ctls.u.allowed_1.activate_secondary_controls )
+    {
+        dp->vmx_procbased_ctls2.available = true;
+        rdmsrl(MSR_IA32_VMX_PROCBASED_CTLS2, dp->vmx_procbased_ctls2.u.raw);
+
+        if ( dp->vmx_procbased_ctls2.u.allowed_1.enable_ept ||
+             dp->vmx_procbased_ctls2.u.allowed_1.enable_vpid )
+        {
+            dp->vmx_ept_vpid_cap.available = true;
+            rdmsrl(MSR_IA32_VMX_EPT_VPID_CAP, dp->vmx_ept_vpid_cap.u.raw);
+        }
+    }
+
+    if ( dp->vmx_basic.u.default1_zero )
+    {
+        dp->vmx_true_pinbased_ctls.available = true;
+        rdmsrl(MSR_IA32_VMX_TRUE_PINBASED_CTLS,
+               dp->vmx_true_pinbased_ctls.u.raw);
+
+        dp->vmx_true_procbased_ctls.available = true;
+        rdmsrl(MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
+               dp->vmx_true_procbased_ctls.u.raw);
+
+        dp->vmx_true_exit_ctls.available = true;
+        rdmsrl(MSR_IA32_VMX_TRUE_EXIT_CTLS, dp->vmx_true_exit_ctls.u.raw);
+
+        dp->vmx_true_entry_ctls.available = true;
+        rdmsrl(MSR_IA32_VMX_TRUE_ENTRY_CTLS, dp->vmx_true_entry_ctls.u.raw);
+    }
+
+    if ( dp->vmx_procbased_ctls2.u.allowed_1.enable_vm_functions )
+    {
+        dp->vmx_vmfunc.available = true;
+        rdmsrl(MSR_IA32_VMX_VMFUNC, dp->vmx_vmfunc.u.raw);
+    }
+}
+
 static void __init calculate_raw_policy(void)
 {
     struct msr_domain_policy *dp = &raw_msr_domain_policy;
@@ -43,6 +118,8 @@  static void __init calculate_raw_policy(void)
         if ( val & MSR_PLATFORM_INFO_CPUID_FAULTING )
             dp->plaform_info.cpuid_faulting = true;
     }
+
+    calculate_raw_vmx_policy(dp);
 }
 
 static void __init calculate_host_policy(void)